Burroughs B6x00-7x00 instruction set

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The Burroughs B6x00-7x00 instruction set includes the set of valid operations for the Burroughs B6500,[1] B7500 and later Burroughs large systems, including the current (as of 2006) Unisys Clearpath/MCP systems; it does not include the instruction for other Burroughs large systems including the B5000, B5500, B5700 and the B8500. These unique machines have a distinctive design and instruction set. Each word of data is associated with a type, and the effect of an operation on that word can depend on the type. Further, the machines are stack[a] based to the point that they had no user-addressable registers.

Overview[edit]

As you would expect from the unique architecture used in these systems, they also have an interesting instruction set. Programs are made up of 8-bit syllables, which may be Name Call, be Value Call or form an operator, which may be from one to twelve syllables in length. There are less than 200 operators, all of which fit into 8-bit syllables. If we ignore the powerful string scanning, transfer, and edit operators, the basic set is only about 120 operators. If we remove the operators reserved for the operating system such as MVST and HALT, the set of operators commonly used by user-level programs is less than 100. The Name Call and Value Call syllables contain address couples; the Operator syllables either use no addresses or use control words and descriptors on the stack.

Since there are no programmer-addressable registers, most of the register manipulating operations required in other architectures are not needed, nor are variants for performing operations between pairs of registers, since all operations are applied to the top of the stack. This also makes code files very compact, since operators are zero-address and do not need to include the address of registers or memory locations in the code stream. Some of the code density was due to moving vital operand information elsewhere, to 'tags' on every data word or into tables of pointers. Many of the operators are generic or polymorphic depending on the kind of data being acted on as given by the tag. The generic opcodes required fewer opcode bits but made the hardware more like an interpreter, with less opportunity to pipeline the common cases.

For example, the instruction set has only one ADD operator. It had to fetch the operand to discover whether this was an integer add or floating point add. Typical architectures require multiple operators for each data type, for example add.i, add.f, add.d, add.l for integer, float, double, and long data types. The architecture only distinguishes single and double precision numbers – integers are just reals with a zero exponent. When one or both of the operands has a tag of 2, a double precision add is performed, otherwise tag 0 indicates single precision. Thus the tag itself is the equivalent of the operator .i, .f, .d, and .l extension. This also means that the code and data can never be mismatched.

Two operators are important in the handling of on-stack data – Value Call (VALC) and Name Call (NAMC). These are two-bit operators, 00 being VALC and 01 being NAMC. The following six bits of the syllable, concatenated with the following syllable, provide the address couple. Thus VALC covers syllable values 0000 to 3FFF and NAMC 4000 to 7FFF.

VALC is another polymorphic operator. If it hits a data word, that word is loaded to the top of stack. If it hits an IRW, that is followed, possibly in a chain of IRWs until a data word is found. If a PCW is found, then a function is entered to compute the value and the VALC does not complete until the function returns.

NAMC simply loads the address couple onto the top of the stack as an IRW (with the tag automatically set to 1).

Static branches (BRUN, BRFL, and BRTR) used two additional syllables of offset. Thus arithmetic operations occupied one syllable, addressing operations (NAMC and VALC) occupied two, branches three, and long literals (LT48) five. As a result, code was much denser (had better entropy) than a conventional RISC architecture in which each operation occupies four bytes. Better code density meant fewer instruction cache misses and hence better performance running large-scale code.

In the following operator explanations remember that A and B are the top two stack registers. Double precision extensions are provided by the X and Y registers; thus the top two double precision operands are given by AX and BY. (Mostly AX and BY is implied by just A and B.)

B6x00/7x00 Address Couple
Current LL Lexical Level
bits
Index
bits
0-1 13 12-0
2-3 13-12 11-0
4-7 13-11 10-0
8-15 13-10 9-0
16-31 13-9 8-0

Arithmetic operators[edit]

ADD
Add top two stack operands (B := B + A or BY := BY + AX if double precision)
SUBT
Subtract (B - A)
MULT
Multiply with single or double precision result
MULX
Extended multiply with forced double precision result
DIVD
Divide with real result
IDIV
Divide with integer result
RDIV
Return remainder after division
NTIA
Integerize truncated
NTGR
Integerize rounded
NTGD
Integerize rounded with double precision result
CHSN
Change sign
JOIN
Join two singles to form a double
SPLT
Split a double to form two singles
ICVD
Input convert destructive – convert BCD number to binary (for COBOL)
ICVU
Input convert update – convert BCD number to binary (for COBOL)
SNGL
Set to single precision rounded
SNGT
Set to single precision truncated
XTND
Set to double precision
PACD
Pack destructive
PACU
Pack update
USND
Unpack signed destructive
USNU
Unpack signed update
UABD
Unpack absolute destructive
UABU
Unpack, absolute update
SXSN
Set external sign
ROFF
Read and clear overflow flip flop
RTFF
Read true/false flip flop

Comparison operators[edit]

LESS
Is B < A?
GREQ
Is B >= A?
GRTR
Is B > A?
LSEQ
Is B <= A?
EQUL
Is B = A?
NEQL
Is B <> A?
SAME
Does B have the same bit pattern as A, including the tag

Logical operators[edit]

LAND
Logical bitwise and of all bits in operands
LOR
Logical bitwise or of all bits in operands
LNOT
Logical bitwise complement of all bits in operand
LEQV
Logical bitwise equivalence of all bits in operands

Branch and call operators[edit]

BRUN
Branch unconditional (offset given by following code syllables)
DBUN
Dynamic branch unconditional (offset given in top of stack)
BRFL
Branch if last result false (offset given by following code syllables)
DBFL
Dynamic branch if last result false (offset given in top of stack)
BRTR
Branch if last result true (offset given by following code syllables)
DBTR
Dynamic branch if last result true (offset given in top of stack)
EXIT
Exit current environment (terminate process)
STBR
Step and branch (used in loops; operand must be SIW)
ENTR
Execute a procedure call as given by a tag 7 PCW, resulting in an RCW at D[n] + 1
RETN
Return from current routine to place given by RCW at D[n] + 1 and remove the stack frame

Bit and field operators[edit]

BSET
Bit set (bit number given by syllable following instruction)
DBST
Dynamic bit set (bit number given by contents of B)
BRST
Bit reset (bit number given by syllable following instruction)
DBRS
Dynamic bit reset (bit number given by contents of B)
ISOL
Field isolate (field given in syllables following instruction)
DISO
Dynamic field isolate (field given in top of stack words)
FLTR
Field transfer (field given in syllables following instruction)
DFTR
Dynamic field transfer (field given in top of stack words)
INSR
Field insert (field given in syllables following instruction)
DINS
Dynamic field insert (field given in top of stack words)
CBON
Count binary ones in the top of stack word (A or AX)
SCLF
Scale left
DSLF
Dynamic scale left
SCRT
Scale right
DSRT
Dynamic scale right
SCRS
Scale right save
DSRS
Dynamic scale right save
SCRF
Scale right final
DSRF
Dynamic scale right final
SCRR
Scale right round
DSRR
Dynamic scale right round

Literal operators[edit]

LT48
Load following code word onto top of stack
LT16
Set top of stack to following 16 bits in code stream
LT8
Set top of stack to following code syllable
ZERO
Shortcut for LT48 0
ONE
Shortcut for LT48 1

Descriptor operators[edit]

INDX
Index create a pointer (copy descriptor) from a base (MOM) descriptor
NXLN
Index and load name (resulting in an indexed descriptor)
NXLV
Index and load value (resulting in a data value)
EVAL
Evaluate descriptor (follow address chain until data word or another descriptor found)

Stack operators[edit]

PUSH
Push down stack register
DLET
Pop top of stack
EXCH
Exchange top two words of stack
RSUP
Rotate stack up (top three words)
RSDN
Rotate stack down (top three words)
DUPL
Duplicate top of stack
MKST
Mark stack (build a new stack frame resulting in an MSCW on the top,

— followed by NAMC to load the PCW, then parameter pushes as needed, then ENTR)

IMKS
Insert an MSCW in the B register.
VALC
Fetch a value onto the stack as described above
NAMC
Place an address couple (IRW stack address) onto the stack as described above
STFF
Convert an IRW as placed by NAMC into an SIRW which references data in another stack.
MVST
Move to stack (process switch only done in one place in the MCP)

Store operators[edit]

STOD
Store destructive (if the target word has an odd tag throw a memory protect interrupt,

— store the value in the B register at the memory addressed by the A register. — Delete the value off the stack.

STON
Store non-destructive (Same as STOD but value is not deleted – handy for F := G := H := J expressions).
OVRD
Overwrite destructive, STOD ignoring read-only bit (for use in MCP only)
OVRN
Overwrite non-destructive, STON ignoring read-only bit (for use in MCP only)

Load operators[edit]

The Load instruction could find itself tripping on an indirect address, or worse, a disguised call to a call-by-name thunk routine.

LOAD
Load the value given by the address (tag 5 or tag 1 word) on the top of stack.

— Follow an address chain if necessary.

LODT
Load transparent – load the word referenced by the address on the top of stack

Transfer operators[edit]

These were used for string transfers usually until a certain character was detected in the source string. All these operators are protected from buffer overflows by being limited by the bounds in the descriptors.

TWFD
Transfer while false, destructive (forget pointer)
TWFU
Transfer while false, update (leave pointer at end of transfer for further transfers)
TWTD
Transfer while true, destructive
TWTU
Transfer while true, update
TWSD
Transfer words, destructive
TWSU
Transfer words, update
TWOD
Transfer words, overwrite destructive
TWOU
Transfer words, overwrite update
TRNS
Translate – transfer a source buffer into a destination converting characters as given in a translate table.
TLSD
Transfer while less, destructive
TLSU
Transfer while less, update
TGED
Transfer while greater or equal, destructive
TGEU
Transfer while greater or equal, update
TGTD
Transfer while greater, destructive
TGTU
Transfer while greater, update
TLED
Transfer while less or equal, destructive
TLEU
Transfer while less or equal, update
TEQD
Transfer while equal, destructive
TEQU
Transfer while equal, update
TNED
Transfer while not equal, destructive
TNEU
Transfer while not equal, update
TUND
Transfer unconditional, destructive
TUNU
Transfer unconditional, update

Scan operators[edit]

These were used for scanning strings useful in writing compilers. All these operators are protected from buffer overflows by being limited by the bounds in the descriptors.

SWFD
Scan while false, destructive
SISO
String isolate
SWTD
Scan while true, destructive
SWTU
Scan while true, update
SLSD
Scan while less, destructive
SLSU
Scan while less, update
SGED
Scan while greater or equal, destructive
SGEU
Scan while greater or equal, update
SGTD
Scan while greater, destructive
SGTU
Scan while greater, update
SLED
Scan while less or equal, destructive
SLEU
Scan while less or equal, update
SEQD
Scan while equal, destructive
SEQU
Scan while equal, update
SNED
Scan while not equal, destructive
SNEU
Scan while not equal, update
CLSD
Compare characters less, destructive
CLSU
Compare characters less, update
CGED
Compare characters greater or equal, destructive
CGEU
Compare characters greater or equal, update
CGTD
Compare character greater, destructive
CGTU
Compare character greater, update
CLED
Compare characters less or equal, destructive
CLEU
Compare characters less or equal, update
CEQD
Compare character equal, destructive
CEQU
Compare character equal, update
CNED
Compare characters not equal, destructive
CNEU
Compare characters not equal, update

System[edit]

SINT
Set interval timer
EEXI
Enable external interrupts
DEXI
Disable external interrupts
SCNI
Scan in – initiate IO read, this changed on different architectures
SCNO
Scan out – initiate IO write, this changed on different architectures
STAG
Set tag (not allowed in user-level processes)
RTAG
Read tag
IRWL
Hardware pseudo operator
SPRR
Set processor register (highly implementation dependent, only used in lower levels of MCP)
RPRR
Read processor register (highly implementation dependent, only used in lower levels of MCP)
MPCW
Make PCW
HALT
Halt the processor (operator requested or some unrecoverable condition has occurred)

Other[edit]

VARI
Escape to extended (variable instructions which were less frequent)
OCRX
Occurs index builds an occurs index word used in loops
LLLU
Linked list lookup – Follow a chain of linked words until a certain condition is met
SRCH
Masked search for equal – Similar to LLLU, but testing a mask in the examined words for an equal value
TEED
Table enter edit destructive
TEEU
Table enter edit, update
EXSD
Execute single micro destructive
EXSU
Execute single micro update
EXPU
Execute single micro, single pointer update
NOOP
No operation
NVLD
Invalid operator (hex code FF)
User operators
unassigned operators could cause interrupts into the operating system so that algorithms could be written to provide the required functionality

Edit operators[edit]

These were special operators for sophisticated string manipulation, particularly for business applications.

MINS
Move with insert – insert characters in a string
MFLT
Move with float
SFSC
Skip forward source character
SRSC
Skip reverse source characters
RSTF
Reset float
ENDF
End float
MVNU
Move numeric unconditional
MCHR
Move characters
INOP
Insert overpunch
INSG
Insert sign
SFDC
Skip forward destination character
SRDC
Skip reverse destination characters
INSU
Insert unconditional
INSC
Insert conditional
ENDE
End edit

Notes[edit]

  1. ^ The lexical level in a syllable may refer either to a marked point in the stack of the current task or to a marked point in the stack of a parent task. The term the stack may refer to multiple related stacks, collectively known as a saguaro stack.

References[edit]

  1. ^ Burroughs (September 1969), Burroughs B6500 Information Processing System Reference Manual (PDF), 1043676