CDC 8600

From Wikipedia, the free encyclopedia
Jump to: navigation, search
The CDC 8600, likely a mock-up made for promotional purposes. The ring of "benches" around the outside contains the power supplies, a design note that Cray would re-use on the Cray-1. Each of the pie-wedges of the computer can be removed for servicing, and heat is removed through the central core.

The CDC 8600 was the last of Seymour Cray's supercomputer designs while working for the Control Data Corporation. As the natural successor to the CDC 6600 and CDC 7600, the 8600 was intended to be about 10 times as fast as the 7600, already the fastest computer on the market.

Development started in 1968, shortly after the release of the 7600, but the project soon started to bog down. By 1971 CDC was having cash-flow problems and the design was still not coming together, prompting Cray to leave the company in 1972. The 8600 design effort was eventually cancelled in 1974, and Control Data moved on to the CDC STAR-100 series instead.


In the 1960s computer design was based on mounting electronic components (transistors, resistors, etc.) on circuit boards. Several boards would be used to make a discrete logic element of the machine, known as a module. Overall machine cycle speed is strongly related to the signal path – the length of the wiring – requiring high-speed computers to make their modules as small as possible. This was at odds with the need to make the modules themselves more complex in order to increase functionality. By the late 1960s the individual components had stopped getting much smaller, so in order to increase the complexity of the machines, the modules would have to grow. In theory, this could slow the machine down due to signalling delays.

Cray aimed to solve these contradictory problems by doing both; making each module larger and crammed with many more components, while at the same time making the computer as a whole smaller by packing the modules closer together inside the machine. Between the time the 7600 was developed and work on the 8600 began, there had been no process improvements in the components themselves, so any performance improvements had to come solely from packaging.[1] For the new design, they used modules containing eight four-layer circuit boards about 8" by 6", resulting in a stack the size of a large textbook and using up about 3 kilowatts of power. The modules were then packed into a mainframe chassis that was comparatively tiny, a 16-sided cylinder about one meter across and high, sitting on top of a ring of power supplies. Perhaps unsurprisingly, the 8600 bears a strong resemblance to the later Cray-1.[2]

With all of this power being dissipated in such a small space, cooling was a major design issue. Cray's refrigeration engineer, Dean Roush, formerly of Amana, placed a sheet of copper inside each of the circuit boards, removing the heat to a copper block on one end where it was cooled by a freon system. This further increased the weight and complexity of the modules, to the point where each one weighed about 15 pounds. The external cooling system was considerably larger than the machine itself.

The components themselves were likewise improved over previous designs. The main CPU circuits moved to ECL-based logic, allowing the clock speed to be increased 125 MHz (8 ns cycle time) from the 7600's 36.4 MHz (27.5 ns cycle time) an increase of about four times. Main memory was also moved to an ECL implementation and the machine was equipped with a whopping 256k-words (2 megabytes) standard. The memory was spread across 64 banks, thereby allowing fast access at about 8 ns/word even though the cycle time of any one bank was about 250 ns. A high-speed core memory with a 20 ns access (overall) was also designed as a backup to the semiconductor version.

Cray decided that the 8600 would include four complete CPUs sharing the main memory. In order to improve overall throughput, the machine could be operated in a special mode in which a single instruction was sent to all four processors with different data. This technique, today known as SIMD, reduced the total number of memory accesses because the instruction was only read once, instead of four times. Each processor was about 2.5 times as fast as a 7600, so with all four running the machine as a whole would be about 10 times as fast, at about 100 MFLOPS.

The government made it clear that all future computer purchases would require ASCII processing.[1] To meet this requirement, the 8600 used a 64-bit word (eight bytes) instead of the earlier 60-bit word (ten six-bit characters) used on the 6600 and 7600. As in prior designs, instructions were "stuffed" into words, with each instruction taking up either 16- or 32-bits (up from 15/30). The 8600 no longer used the A or B registers as in previous designs, and included a set of 16 general-purpose X registers instead. A 6600/7600 Peripheral Processor system was used for I/O, largely unchanged.

Some effort was made to help compatibility between the older machines and the 8600, but the change in work length made this difficult. Instead, floating point formats were retained, allowing Fortran code to port directly.[1]

Company problems[edit]

In 1971 Control Data was undergoing a "belt tightening" due to the cost of an ongoing lawsuit against IBM, and all divisions were asked to reduce their payroll by 10%. Cray begged to be exempted in order to get the 8600 shipping, and when this request was refused he instead had his own pay cut to minimum wage to solve the problem.

By 1972 it appeared that even Cray's legendary module design abilities were failing him in the case of the 8600. Reliability was so poor that it was appeared impossible to get a whole machine working. This was not the first time this had happened: on the 6600 project Cray had to start over from scratch, and the 7600 was in production for some time before it started working reliably. In this case Cray decided the current design was a dead-end, and told William Norris (CDC's CEO) that the only way forward was to redesign the machine from scratch. The finances of the company were dangerous, and Norris decided that he couldn't take the risk; Cray would have to continue with the current design.

In 1972 Cray decided that he couldn't work under such conditions, and left CDC to form Cray Research. For his new work he abandoned the multiprocessor concept, concerned that software of the era would be unable to take full advantage of the CPUs. He may have come to this conclusion after the ILLIAC IV finally entered operation at about the same time, and proved to have disappointing performance.

Team members convinced Norris that the 8600 could be completed even without Cray, and work continued at the Chippewa Lab. By 1974 the machine still didn't work correctly. Jim Thornton's competing STAR design had reached production quality at this point, and the 8600 project was then cancelled. In service STAR proved to have poor real-world performance, and when the Cray-1 entered the market in 1976, CDC was quickly pushed from the supercomputer market. An effort was made to re-enter the market in the 1980s with the ETA-10, but this ended poorly.


  • Gordon Bell puts the project start at 1968, while the only mention at the former Cray museum states it was 1970.
  • Quoted memory speed varies widely, with some sources suggesting a 22 ns cycle time for the semiconductor and 20 ns for the core, while other suggest the higher numbers used in this article. Nor is it clear if the core memory was designed as a backup, or that the semiconductor memory came along later.




  • Lincoln, Neil (1975). Reminiscences of computer architecture and computer design at Control Data Corporation (Technical report). Charles Babbage Institute. 

Further reading[edit]