Central Air Data Computer

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A Central Air Data Computer computes altitude, vertical speed, air speed, and mach number from sensor inputs such as pitot and static pressure and temperature.[1] Early CADC systems were electromechanical computers, such as in the F-111.[2] From 1968 to 1970, the first digital CADC was developed for the F-14. Following the success of the Swedish CK37 in the AJ37. In the 1980s, the Standard Central Air Data Computer was developed to retrofit U.S. Air Force and U.S. Navy aircraft.[3]

It was classified by the Navy until 1998, meaning that Intel's 4-bit 4004 CPU (released in 1971) was widely regarded as the first-ever microprocessor.[4]

F-14 CADC[edit]

The MP944 was a classified design used to control the swing wings and flight controls of the F-14 Tomcat Naval Interceptor.

The F-14 CADC was a ground-breaking integrated flight control system developed by Garrett AiResearch. It was used in early versions of the US Navy's F-14 Tomcat fighter. It is notable for its early use of AiResearch's custom-designed MOS-based LSI microprocessor chipset, the MP944.[5]

The CADC was designed and built at Garrett AiResearch by a team led by Steve Geller and Ray Holt, and supported by the startup American Microsystems. Design work started in 1968 and was completed in June 1970, beating out a number of electromechanical systems that had also been designed for the F-14. Ray Holt's story of this design and development is presented in the book The Accidental Engineer.[citation needed]

The CADC consisted of an A-to-D converter, several quartz pressure sensors, and the MOS-based microprocessor. Inputs to the system included the primary flight controls, a number of switches, static and dynamic air pressure (for calculating stall points and aircraft speed) and a temperature gauge. The outputs controlled the primary flight controls, wing sweep, the F-14's leading edge "glove", and the flaps.

The MP944 ran at 375 KHz. It contained six chips used to build the CADC's microprocessor, all based on a 20-bit fixed-point-fraction two's complement number system. They were the Parallel Multiplier Unit (PMU) in a 28-pin DIP, the Parallel Divider Unit (PDU) (28-pin DIP), the Random Access Storage (RAS) (14-pin DIP), the Read-Only Memory (ROM) (14-pin DIP), the Special Logic Function (SLF) (28-pin DIP), and the Steering Logic Unit (SLU) (28-pin DIP). The complete microprocessor system of 28 circuits consists of 1 PMU, 1 PDU, 1 SLF, 3 RASs, 3 SLUs, and 19 ROMs.

In 1971, Holt wrote an article about the system for Computer Design magazine,[6] but the Navy classified it, and finally released it in 1998. For this reason, the CADC and MP944 remain fairly obscure in spite of their historical importance.


  1. ^ Dictionary of Military and Associated Terms. DIANE Publishing. Oct 1, 1987. p. 63. ISBN 9780941375108.
  2. ^ F-111 Aardvark Pilot's Flight Operating Manual. United States Air Force. August 2007. p. 1–57. ISBN 9781430312123.
  3. ^ "New Avionics Standardization Initiative - Standard Central Air Data Computer (SCADC)". Feedback. Wright-Patterson Air Force Base. II (1): 3.
  4. ^ Standard Central Air Data Computer (PDF). GEC Avionics. 1985.
  5. ^ Ray Holt's page on the CADC and the F-14 Archived 2011-05-30 at the Wayback Machine
  6. ^ 1971 paper on the CADC (which was classified and never published)