Channel length modulation
One of several short-channel effects in MOSFET scaling, channel length modulation (CLM) is a shortening of the length of the inverted channel region with increase in drain bias for large drain biases. The result of CLM is an increase in current with drain bias and a reduction of output resistance. Channel length modulation occurs in all field effect transistors, not just MOSFETs.
To understand the effect, first the notion of pinch-off of the channel is introduced. The channel is formed by attraction of carriers to the gate, and the current drawn through the channel is nearly a constant independent of drain voltage in saturation mode. However, near the drain, the gate and drain jointly determine the electric field pattern. Instead of flowing in a channel, beyond the pinch-off point the carriers flow in a subsurface pattern made possible because the drain and the gate both control the current. In the figure at the right, the channel is indicated by a dashed line and becomes weaker as the drain is approached, leaving a gap of uninverted silicon between the end of the formed inversion layer and the drain (the pinch-off region).
As the drain voltage increases, its control over the current extends further toward the source, so the uninverted region expands toward the source, shortening the length of the channel region, the effect called channel-length modulation. Because resistance is proportional to length, shortening the channel decreases its resistance, causing an increase in current with increase in drain bias for a MOSFET operating in saturation. The effect is more pronounced the shorter the source-to-drain separation, the deeper the drain junction, and the thicker the oxide insulator.
In the weak inversion region, the influence of the drain analogous to channel-length modulation leads to poorer device turn off behavior known as drain-induced barrier lowering, a drain induced lowering of threshold voltage.
In bipolar devices a similar increase in current is seen with increased collector voltage due to base-narrowing, known as the Early effect. The similarity in effect upon the current has led to use of the term "Early effect" for MOSFETs as well, as an alternative name for "channel-length modulation".
Shichman–Hodges model 
In textbooks, channel length modulation in active mode usually is described using the Shichman–Hodges model, accurate only for old technology: where = drain current, = technology parameter sometimes called the transconductance coefficient, W ,L = MOSFET width and length, = gate-to-source voltage, =threshold voltage, = drain-to-source voltage, , and λ = channel-length modulation parameter. In the classic Shichman–Hodges model, is a device constant, which reflects the reality of transistors with long channels.
In the Shichman–Hodges model used above, output resistance is given as:
where = drain-to-source voltage, = drain current and = channel-length modulation parameter. Without channel-length modulation (for λ = 0), the output resistance is infinite. The channel-length modulation parameter usually is taken to be inversely proportional to MOSFET channel length L, as shown in the last form above for rO:
where VE is a fitting parameter, although it is similar in concept to the Early Voltage for BJTs. For a 65 nm process, roughly VE ≈ 4 V/μm. (A more elaborate approach is used in the EKV model.). However, no simple formula used for λ to date provides accurate length or voltage dependence of rO for modern devices, forcing use of computer models, as discussed briefly next.
The effect of channel-length modulation upon the MOSFET output resistance varies both with the device, particularly its channel length, and with the applied bias. The main factor affecting the output resistance in longer MOSFETs is channel length modulation as just described. In shorter MOSFETs additional factors arise such as: drain-induced barrier lowering (which lowers the threshold voltage, increasing the current and decreasing the output resistance), velocity saturation (which tends to limit the increase in channel current with drain voltage, thereby increasing the output resistance) and ballistic transport (which modifies the collection of current by the drain, and modifies drain-induced barrier lowering so as to increase supply of carriers to the pinch-off region, increasing the current and decreasing the output resistance). Again, accurate results require computer models.
References and notes
- "NanoDotTek Report NDT14-08-2007, 12 August 2007" (PDF). NanoDotTek. Archived from the original (PDF) on 17 June 2012. Retrieved 23 March 2015.
- W. M. C. Sansen (2006). Analog Design Essentials. Dordrecht: Springer. pp. §0124, p. 13. ISBN 0-387-25746-2.
- Trond Ytterdal; Yuhua Cheng; Tor A. Fjeldly (2003). Device Modeling for Analog and RF CMOS Circuit Design. New York: Wiley. p. 212. ISBN 0-471-49869-6.