Clamper (electronics)

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Positive unbiased voltage clamping vertically translates the input waveform so that all parts of it are approximately greater than 0 V. Note that the negative swing of the output will not dip below about −0.6 V, assuming a silicon pn diode.[1]

A clamper is an electronic circuit that fixes either the positive or the negative peak excursions of a signal to a defined value by shifting its DC value.[2] The clamper does not restrict the peak-to-peak excursion of the signal, it moves the whole signal up or down so as to place the peaks at the reference level. A diode clamp (a simple, common type) consists of a diode, which conducts electric current in only one direction and prevents the signal exceeding the reference value; and a capacitor, which provides a DC offset from the stored charge. The capacitor forms a time constant with a resistor load, which determines the range of frequencies over which the clamper will be effective.

General function[edit]

A clamping circuit (also known as a clamper) will bind the upper or lower extreme of a waveform to a fixed DC voltage level. These circuits are also known as DC voltage restorers. Clampers can be constructed in both positive and negative polarities. When unbiased, clamping circuits will fix the voltage lower limit (or upper limit, in the case of negative clampers) to 0 volts. These circuits clamp a peak of a waveform to a specific DC level compared with a capacitively-coupled signal, which swings about its average DC level.

The clamping network is one that will "clamp" a signal to a different dc level. The network must have a capacitor, a diode, and optionally a resistive element and/or load, but it can also employ an independent dc supply to introduce an additional shift. The magnitude of R and C must be chosen such that the time constant RC is large enough to ensure that the voltage across the capacitor does not discharge significantly during the interval the diode is nonconducting.


Clamp circuits are categorised by their operation; negative or positive, and biased or unbiased. A positive clamp circuit (negative peak clamper) outputs a purely positive waveform from an input signal; it offsets the input signal so that all of the waveform is greater than 0 V. A negative clamp is the opposite of this—this clamp outputs a purely negative waveform from an input signal. A bias voltage between the diode and ground offsets the output voltage by that amount.

For example, an input signal of peak value 5 V (VINpeak = 5 V) is applied to a positive clamp with a bias of 3 V (VBIAS = 3 V), the peak output voltage will be:

VOUTpeak = 2 × VINpeak + VBIAS
VOUTpeak = 2 × 5 V + 3 V
VOUTpeak = 13 V

Note that the peak to peak excursion remains at 10 V

Positive unbiased[edit]

A positive unbiased clamp.

In the negative cycle of the input AC signal, the diode is forward biased and conducts, charging the capacitor to the peak negative value of VIN. During the positive cycle, the diode is reverse biased and thus does not conduct. The output voltage is therefore equal to the voltage stored in the capacitor plus the input voltage,[3] so VOUT = VIN + VINpeak. This is also called a Villard circuit.

Negative unbiased[edit]

A negative unbiased clamp

A negative unbiased clamp is the opposite of the equivalent positive clamp. In the positive cycle of the input AC signal, the diode is forward biased and conducts, charging the capacitor to the peak positive value of VIN. During the negative cycle, the diode is reverse biased and thus does not conduct. The output voltage is therefore equal to the voltage stored in the capacitor plus the input voltage again, so VOUT = VIN − VINpeak.

Positive biased[edit]

A positive biased clamp

A positive biased voltage clamp is identical to an equivalent unbiased clamp but with the output voltage offset by the bias amount VBIAS. Thus, VOUT = VIN + (VINpeak + VBIAS).

Negative biased[edit]

A negative biased clamp

A negative biased voltage clamp is likewise identical to an equivalent unbiased clamp but with the output voltage offset in the negative direction by the bias amount VBIAS. Thus, VOUT = VIN − (VINpeak + VBIAS).

Op-amp circuit[edit]

Precision op-amp clamp circuit[4]

The figure shows an op-amp clamp circuit with a non-zero reference clamping voltage. The advantage here is that the clamping level is at precisely the reference voltage. There is no need to take into account the forward voltage drop of the diode (which is necessary in the preceding simple circuits as this adds to the reference voltage). The effect of the diode voltage drop on the circuit output will be divided down by the gain of the amplifier, resulting in an insignificant error. The circuit also has a great improvement in linearity at small input signals in comparison to the simple diode circuit and is largely unaffected by changes in the load.

Clamping for input protection[edit]

Clamping can be used to adapt an input signal to a device that cannot make use of or may be damaged by the signal range of the original input.

Principles of operation[edit]

During the first negative phase of the AC input voltage, the capacitor in a positive clamper circuit charges rapidly. As Vin becomes positive, the capacitor serves as a voltage doubler; since it has stored the equivalent of Vin during the negative cycle, it provides nearly that voltage during the positive cycle. This essentially doubles the voltage seen by the load. As Vin becomes negative, the capacitor acts as a battery of the same voltage of Vin. The voltage source and the capacitor counteract each other, resulting in a net voltage of zero as seen by the load.


For passive type clampers with a capacitor, followed by a diode in parallel with the load, the load can significantly affect performance. The magnitude of R and C are chosen so that the time constant, , is large enough to ensure that the voltage across the capacitor does not discharge significantly during the diode's non-conducting interval. A load resistance that is too low (heavy load) will partially discharge the capacitor and cause the waveform peaks to drift off the intended clamp voltage. This effect is greatest at low frequencies. At a higher frequency, there is less time between cycles for the capacitor to discharge.

The capacitor cannot be made arbitrarily large to overcome load discharge. During the conducting interval, the capacitor must be recharged. The time taken to do this is governed by a different time constant, this time set by the capacitance and the internal impedance of the driving circuit. Since the peak voltage is reached in one quarter cycle and then starts to fall again, the capacitor must be recharged in a quarter cycle. This requirement calls for a low value of capacitance.

The two conflicting requirements for capacitance value may be irreconcilable in applications with a high driving impedance and low load impedance. In such cases, an active circuit must be used such as the op-amp circuit described above.

Biased versus non-biased[edit]

By using a voltage source and resistor, the clamper can be biased to bind the output voltage to a different value. The voltage supplied to the potentiometer will be equal to the offset from zero (assuming an ideal diode) in the case of either a positive or negative clamper (the clamper type will determine the direction of the offset). If a negative voltage is supplied to either positive or negative, the waveform will cross the x-axis and be bound to a value of this magnitude on the opposite side. Zener diodes can also be used in place of a voltage source and potentiometer, hence setting the offset at the Zener voltage.


Clamping circuits were common in analog television receivers. These sets have a DC restorer circuit, which returns the voltage of the video signal during the 'back porch' of the line blanking (retrace) period to 0 V. Low frequency interference, especially power line hum, induced onto the signal spoils the rendering of the image, and in extreme cases causes the set to lose synchronization. This interference can be effectively removed via this method.

See also[edit]


  1. ^ Martin Hartley Jones (1995). A Practical Introduction to Electronic Circuits. Cambridge University Press. p. 261. ISBN 978-0-521-47879-3.
  2. ^ Makarov, Sergey N.; Ludwig, Reinhold; Bitar, Stephen J. (27 June 2016). Practical electrical engineering. Switzerland: Springer International. p. 827. ISBN 9783319211732. OCLC 953450203.
  3. ^ Horowitz, Paul; Winfield, Hill (30 March 2015). The Art of Electronics Third Edition. New York: Cambridge University Press. p. 37. ISBN 9780521809269.
  4. ^ S. P. Bali, Linear Integrated Circuits, p.279, Tata McGraw-Hill, 2008 ISBN 0-07-064807-7.

Further reading[edit]

  • R. M. Marston (1991). Diode, Transistor & Fet Circuits Manual. Newness. pp. 13–17. ISBN 978-1-4831-3540-3.
  • Rectifier Applications Handbook HB214/D Rev. 2. ON Semiconductor. Nov 2001. pp. 160–161.
  • J. A. Coekin (1975). High-Speed Pulse Techniques. Pergamon. pp. 60–64. ISBN 978-1-4831-0548-2.