CompactRISC is a family of instruction set architectures from National Semiconductor. The architectures are designed according to reduced instruction set computing principles, and are mainly used in microcontrollers. The subarchitectures of this family are the 16-bit CR16 and CR16C and the 32-bit CRX.
It has complex instructions such as bit manipulation, saving/restoring and push/pop of several registers with single command.
CR16 has 16 general purpose registers of 16 bits, and address registers of 21 bits wide. There are 8 special registers: program counter, interrupt stack pointer ISP, interrupt vector address register INTBASE, status register PSR, configuration register and 3 debug registers. Status register implements flags: C, T, L, F, Z, N, E, P, I.
Instructions are encoded in two-address form in several formats, usually they have 16-bit encoding, but there are two formats for medium immediate instructions with length of 32-bit. Typical opcode length is 4 bits (bits 9-12 of most encoding types. Basic encoding formats are: Register-to-Register, Short 5-bit immediate value to Register, Medium immediate of 16-bit value to Register (32 bit encoding), Load/Store relative with short 5-bit displacement (2 bit opcode), Load/Store relative with medium 18-bit displacement (32 bit encoding, 2 bit opcode).
CR16 implements traps and interrupts. Implementations of CR16 has three-stage pipeline: Fetch, Decode, Execute.
CR16 was used in several National Semiconductor microcontrollers, and since 2001 integrated microcontrollers were available having built-it flash memory. Since 2007 CR16-based IP was available to licensing
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- National Semiconductor Embedded Microcontrollers (CR16 and COP8)
- CompactRISC Core Architecture page on National Semiconductor website (archived copy from 2007)
- CR16B Programmer’s Reference Manual, National Semiconductor, 1997
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