Compute Express Link
|Speed||1.x (32 GT/s): |
Compute Express Link (CXL) is an open standard interconnect for high-speed CPU-to-device and CPU-to-memory designed to accelerate next-generation data center performance.  CXL is built upon the PCI Express (PCIe) physical and electrical interface with protocols in three key areas: I/O, memory and cache coherence.
CXL Specification 1.0
On March 11, 2019, the CXL Specification 1.0 based upon PCIe 5.0 was released. The founding promoter members of the CXL specification included: Alibaba, Cisco, Dell EMC, Facebook, Google, HPE, Huawei, Intel and Microsoft.
CXL Specification 1.1
In June, 2019, the CXL Specification 1.1 was released.
Compute Express Link Consortium Members
Founding promoters as of September 21, 2019, are:
Current members as of September 21, 2019, are:
- Cache coherent interconnect for accelerators (CCIX)
- Coherent Accelerator Processor Interface (CAPI)
- "ABOUT CXL". Compute Express Link. Retrieved 2019-08-09.
- Cutress, Ian. "CXL Specification 1.0 Released: New Industry High-Speed Interconnect From Intel". www.anandtech.com. Retrieved 2019-08-09.
- "AMD Joins Consortia to Advance CXL, a New High-... | Community". community.amd.com. Retrieved 2019-08-09.
- "How do the new Intel Agilex FPGA family and the CXL coherent interconnect fabric intersect?". PSG@Intel. 2019-05-03. Retrieved 2019-08-09.