Computer architecture simulator

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A computer architecture simulator, or an architectural simulator, is a piece of software to model computer devices (or components) to predict outputs and performance metrics on a given input. An architectural simulator can model a target microprocessor only (see instruction set simulator), or an entire computer system (see full system simulator) including a processor, a memory system, and I/O devices.

A full-system simulator is an architecture simulator that simulates an electronic system at such a level of detail that complete software stacks from real systems can run on the simulator without any modification. A full system simulator effectively provides virtual hardware that is independent of the nature of the host computer. The full-system model typically has to include processor cores, peripheral devices, memories, interconnection buses, and network connections.

The defining property of full-system simulation compared to an instruction set simulator is that the model allows real device drivers and operating systems to be run, not just single programs. Thus, full-system simulation makes it possible to simulate individual computers and networked computer nodes with all their software, from network device drivers to operating systems, network stacks, middleware, servers, and application programs.

A cycle-accurate simulator is a computer program that simulates a microarchitecture on a cycle-by-cycle basis. In contrast an instruction set simulator simulates an instruction set architecture usually faster but not cycle-accurate to a specific implementation of this architecture; they are often used when emulating older hardware, where time precisions are very important from legacy reasons. More often CAS is used when designing new microprocessors – they can be tested, and benchmarked accurately (including running full operating system, or compilers) without actually building a physical chip, and easily change design many times to meet expected plan.

Cycle-accurate simulators must ensure that all operations are executed in the proper virtual (or real if it is possible) time – branch prediction, cache misses, fetches, pipeline stalls, thread context switching, and many other subtle aspects of microprocessors.


Computer architecture simulators can be classified into many different categories depending on the context.

  • Scope: micro-architecture vs. full-system simulators. The modeled scope could be only one microprocessor or the whole computer system.
  • Detail: functional vs. timing (or performance) simulators. Functional simulators emphasize achieving the same function as the modeled components (what is done), while timing simulators strive to accurately reproduce the performance/timing features (when is it done) of the targets in addition to their functionalities.
  • Input (sometimes called Workload): trace-driven (or event-driven) vs. execution-driven simulators. Traces/Events are pre-recorded streams of instructions with some fixed input. Execution-driven simulators allow dynamic change of instructions to be executed depending on different input data.

Microarchitecture Simulation is a technique for modeling the design and behavior of a microprocessor and its components.

Full system simulation consist in the simulation of a complete computer system able to execute unmodified programs (it is this thus execution-driven). Such simulators are called emulator, in particular when they imitate existing (or discontinued) hardware instead of under development hardware.

Instruction Set Simulator and Cycle Accurate Simulator are simulators whose scope is the simulation of a sole microprocessor. They diverge in the level of details that they provide. Instruction set simulators focus on the fast simulation of the processor functions while cycle accurate simulators aim at allowing accurate timings of the processor.

Benefits of simulators[edit]

Architectural simulators are very useful for the following purposes:

  • evaluating different hardware designs without building costly physical hardware systems.
  • enabling the opportunities to access non-existing computer components or systems
  • obtaining detailed performance metrics: A single execution of simulators can often generate a large set of performance data.
  • debugging: Debugging on real hardware typically require re-booting and re-running the code to reproduce the problems. In contrast, some simulators have a fully controlled environment and allow software developers to run code backward once an error is detected.

Full system simulation can speed the system development process by making it easier to detect, recreate and repair flaws.[1] The use of multi-core processors is driving the need for full system simulation, because it can be extremely difficult and time-consuming to recreate and debug errors without the controlled environment provided by virtual hardware.[2] This also allows the software development to take place before the hardware is ready,[3] thus helping to validate design decisions.


Some popular architectural simulators include:

  • CPU Sim, a Java application that allows the user to design and create a simple architecture and instruction set and then run programs of instructions from the set through simulation
  • CPU-OS Simulator: RISC type CPU + multi-tasking OS simulator suite
  • Compass: TrueNorth[4]
  • ESCAPE: environment for the simulation of computer architectures for the purpose of education.[5][6][7]
  • g88 in late 1980s for modeling a uniprocessor M881100-based system, capable of booting Unix
  • gsim in early 1990s for modeling multiple processors with shared memory.
  • gem5: a freely available academic full system simulator developed at the University of Wisconsin
  • GEMS [2]: General Execution-driven Multiprocessor Simulator
  • Imperas [3]: a commercial full system simulator simulating ARMv7, ARMv8, MIPS, Power, R850, MicroBlaze, NiosII, ARC, and other architectures
  • JADE: Heterogeneous Multiprocessor Design & Simulation Environment
  • HASE: hierarchical computer architecture design and simulation environment.[8]
  • MARSSx86: QEMU-based x86 full system simulator (utilized modified version of PTLSim internally).[9]
  • MikroSim: a Microcode programmable CPU simulator
  • Multi2Sim: A cycle-accurate Heterogeneous System Simulator for CPU-GPU architectures
  • OVPsim [4]: a freely available, proprietary full system simulator
  • PDP-11 simulator in 1980s
  • PTLsim, a cycle accurate x86-64 full system simulator
  • SESC:a cycle-accurate MIPS architectural simulator
  • Sniper: a next generation parallel, high-speed and accurate x86 simulator.
  • Simics: a full system simulator
  • SimOS: for MIPS-based multiprocessors
  • SimNow: AMD full-system simulator for x86 and x86_64 systems
  • SimpleScalar: a microarchitectural simulator suite
  • SST: Structural Simulation Toolkit, which has both Macro and Micro scale versions
  • UISASim: a Java-based simulator that enables the design of ISAs and automatically generate a soft processor implementation applicable on FPGA [10]
  • VisualSim Architect
  • zsim: a fast, parallel x86-64 simulator

See also[edit]


  1. ^ Peter Magnusson (2004). "Full System Simulation: Software Development's Missing Link". 
  2. ^ Debugging and Full System Simulation
  3. ^ Vania Joloboff (2009). "Full System Simulation of Embedded Systems" (PDF). 
  4. ^
  5. ^ Jan Van Campenhout, Peter Verplaetse, Henk Neefs. "ESCAPE: environment for the simulation of computer architectures for the purpose of education". [1] doi: 10.1145/1275182.1275191. doi: 1998.
  6. ^ Frederik Habils, Peter Verplaetse, Jan Van Campenhout. "Using ESCAPE: Environment for the Simulation of Computer Architectures for the Purpose of Education". 1999.
  7. ^ "Environment for the Simulation of Computer Architectures for the Purpose of Education". executable and source files.
  8. ^ "Computer Architecture Simulation & Visualisation".
  9. ^ MARSSx86 - Micro-ARchitectural and System Simulator for x86-based Systems
  10. ^ Almasri, I., Abandah, G., Shhadeh, A., & Shahrour, A. (2011, December). Universal ISA simulator with soft processor FPGA implementation. In Applied Electrical Engineering and Computing Technologies (AEECT), 2011 IEEE Jordan Conference on (pp. 1-6). IEEE.

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