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In the electronics industry, dark silicon is the amount of circuitry of an integrated circuit that cannot be powered-on at the nominal operating voltage for a given thermal design power (TDP) constraint. This is a challenge in the era of nanometer semiconductor nodes, where transistor scaling and voltage scaling are no longer in line with each other, resulting in the failure of Dennard scaling. This discontinuation of Dennard scaling has led to sharp increases in power densities that hamper powering-on all the transistors simultaneously at the nominal voltage, while keeping the chip temperature in the safe operating range. According to recent studies, researchers from different groups have projected that, at 8 nm technology nodes, the amount of Dark Silicon may reach up to 50–80% depending upon the processor architecture, cooling technology, and application workloads. Dark Silicon may be unavoidable even in server workloads with abundance of inherent client request-level parallelism.
Challenges and opportunities
The emergence of Dark Silicon introduces several challenges on the architecture, electronic design automation (EDA), and Hardware-Software co-design communities. For instance, how best to utilize the plethora of transistors (with potentially many dark ones) for designing and managing energy-efficient on-chip many-core systems under peak power and thermal constraints. Architects have initiated several efforts in leveraging the Dark Silicon to design application-specific and accelerator-rich architectures. Recently, researchers have explored how Dark Silicon exposes new challenges and opportunities for the EDA community. In particular, they have demonstrated the thermal, reliability (soft error and aging), and process variation concerns for Dark Silicon many-core processors.
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