In signal processing, a digital biquad filter is a second order recursive linear filter, containing two poles and two zeros. "Biquad" is an abbreviation of "biquadratic", which refers to the fact that in the Z domain, its transfer function is the ratio of two quadratic functions:
The coefficients are often normalized such that a0 = 1:
High-order infinite impulse response filters can be highly sensitive to quantization of their coefficients, and can easily become unstable. This is much less of a problem with first and second-order filters; therefore, higher-order filters are typically implemented as serially-cascaded biquad sections (and a first-order filter if necessary). The two poles of the biquad filter must be inside the unit circle for it to be stable. In general, this is true for all discrete filters i.e. all poles must be inside the unit circle in the Z-domain for the filter to be stable.
Direct form 1
The most straightforward implementation is the direct form 1, which has the following difference equation:
or, if normalized:
Here the , and coefficients determine zeros, and , determine the position of the poles.
Flow graph of biquad filter in direct form 1:
When these sections are cascaded for filters of order greater than 2, efficiency of implementation can be improved by noticing the delay of a section output is cloned in the next section input. Two storage delay components may be eliminated between sections.
Direct form 2
The direct form 2 implements the same normalized transfer function as direct form 1, but in two parts:
and using the difference equation:
Flow graph of biquad filter in direct form 2:
The direct form 2 implementation only needs N delay units, where N is the order of the filter – potentially half as much as direct form 1. This structure is obtained by reversing the order of the numerator and denominator sections of direct Form 1, since they are in fact two linear systems, and the commutativity property applies. Then, one will notice that there are two columns of delays () that tap off the center net, and these can be combined since they are redundant, yielding the implementation as shown.
The disadvantage is that direct form 2 increases the possibility of arithmetic overflow for filters of high Q or resonance. It has been shown that as Q increases, the round-off noise of both direct form topologies increases without bounds. This is because, conceptually, the signal is first passed through an all-pole filter (which normally boosts gain at the resonant frequencies) before the result of that is saturated, then passed through an all-zero filter (which often attenuates much of what the all-pole half amplifies).
The direct form 2 implementation is called the canonical form, because it uses the minimal amount of delays, adders and multipliers, yielding in the same transfer function as the direct form 1 implementation.
Transposed direct forms
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Each of the two direct forms may be transposed by reversing the flow graph without altering the transfer function. Branch points are changed to summers and summers are changed to branch points. These provide modified implementations that accomplish the same transfer function which can be mathematically significant in a real-world implementation where precision may be lost in state storage.
The difference equations for transposed direct form 2 are:
Transposed direct form 1
Transposed direct form 2
When a sample of n bits is multiplied by a coefficient of m bits, the product has n+m bits. These products are typically accumulated in a DSP register, the addition of five products may need 3 overflow bits; this register is often large enough to hold n+m+3 bits. The z−1 is implemented by storing a value for one sample time; this storage register is usually n bits, the accumulator register is rounded to fit n bits, and this introduced quantizing noise.
In the direct form 2 arrangement, there also is a quantizing/rounding function for an intermediate value. In a cascade, the value may not need rounding between stages, but the final output may need rounding.
Fixed point DSP usually prefers the non transposed forms and has an accumulator with a large number of bits, and is rounded when stored in main memory. Floating point DSP usually prefers the transposed form, each multiplication and potentially each addition are rounded; the additions are higher precision result, when both operands have similar magnitude.