FeiTeng (processor)

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The FeiTeng (飞腾, fēiténg) - several computer central processing units designed and produced in China.[1]

FeiTeng-1000 is third generation CPU from the YinHeFeiTeng (银河飞騰, YHFT) family. This CPU family has been developed by team directed by NUDT Prof. Xing Zuocheng.[2] The first generation was binary compatible with the Intel Itanium 2. The second generation, the FT64, was a system on a chip with CPU and 64-bit stream processor. FT64 were used in YinHe (银河) supercomputers as accelerators.[3]


FeiTeng-1000 is manufactured with 65 nm technology and contains 350 million gates. Its clock frequency is 0.8–1 GHz. It is compatible with SPARCv9 instruction set architecture.[4]

Each chip contains 8 cores and is capable of executing 64 threads. There are 3 HyperTransport channels for coherent links, 4 DDR3 memory controllers and a 8x PCIe 2.0 link. [5]

The Tianhe-1A supercomputer uses 2,048 FeiTeng 1000 processors.[6] Tianhe-1A has a theoretical peak performance of 4.701 petaflops.[5][7] The FeiTeng-1000 is an eight-core processor based on the SPARC system and is used to operate service nodes on the Tianhe-1.[1][5]

It has been speculated that FeiTeng used the work of the OpenSPARC project.[8]

Galaxy FT-1500[edit]

Tianhe-2 supercomputer uses 4096 processors Galaxy FT-1500 with 16 cores, OpenSPARC architecture based and 65 W TDP. They are made with 40 nm technology, processor cores work at 1.8 GHz[9] Peak performance of FT-1500 is 115–144 GFLOPS; every core may execute up to 8 interleaving threads and supports 256-bit wide SIMD vector operations including Fused Mul-Add (FMA). Cache of this SoC works at 2 GHz frequency, there are 16 KB L1i, 16 KB L1d, 512 KB L2 per core, and shared 4 MB L3 cache. L3 cache has 4 segments (1 segment per block of 4 CPU cores), each of 1 MB with 32-way associative. Cache uses directory-based cache coherency protocol. FT-1500 also has:[10]

  • Links to connect several processors into NUMA machine
  • 4 integrated DDR3 memory controllers
  • 2 PCI-express controllers
  • 10 Gbit Ethernet ports


FT-1500A is a ARM64 SoC designed by Phytium, which includes 16 cores of ARMv8 processor, a 32-lane PCIe host, 2 GMAC on-chip ethernet controller and a GICv3 interrupt controller with ITS support.[11]

See also[edit]


  1. ^ a b U.S. says China building 'entirely indigenous' supercomputer, by Patrick Thibodeau Computerworld, November 4, 2010 [1]
  2. ^ http://www.ee.ust.hk/ece.php/event/detail/671 «Prof. Xing and his team developed FT-1000/1000A/1500 series multi-core processors, the world’s first general-purpose 64-bit stream processor for scientific computing, and the world’s first CPU compatible with Intel Itanium processor.»
  3. ^ http://www.ece.ust.hk/ece.php/event/detail/702
  4. ^ http://english.people.com.cn/90001/90778/90860/7331502.html
  5. ^ a b c The TianHe-1A Supercomputer: Its Hardware and Software by Xue-Jun Yang, Xiang-Ke Liao, et al in the Journal of Computer Science and Technology, Volume 26, Number 3, May 2011, pages 344-351 [2]
  6. ^ "Top100". 28 October 2010. 
  7. ^ "China builds world's fastest supercomputer". ZDNet UK. 29 October 2010. 
  8. ^ http://www.prace-project.eu/IMG/pdf/d8.4_1ip.pdf page 41
  9. ^ Dongarra, Jack (3 June 2013). "Visit to the National University for Defense Technology Changsha, China" (PDF). Netlib. (English) page 9
  10. ^ MilkyWay-2 supercomputer: system and application. Xiangke LIAO, Liquan XIAO, Canqun YANG, Yutong LU. Front. Comput. Sci., 2014, 8(3): 345–356 DOI:10.1007/s11704-014-3501-3 (September 6, 2013)
  11. ^ https://marc.info/?l=linux-kernel&m=142328682903889