Flynn's taxonomy is a classification of computer architectures, proposed by Michael Flynn in 1966. The classification system has stuck, and has been used as a tool in design of modern processors and their functionalities. Since the rise of multiprocessing CPUs, a multiprogramming context has evolved as an extension of the classification system.
- 1 Classifications
- 2 Diagram comparing classifications
- 3 Further divisions
- 4 References
- 5 External links
The four classifications defined by Flynn are based upon the number of concurrent instruction (or control) streams and data streams available in the architecture.
|Single instruction stream||Multiple instruction streams||Single program||Multiple programs|
|Single data stream||SISD||MISD|
|Multiple data streams||SIMD||MIMD||SPMD||MPMD|
SISD (Single instruction stream, single data stream)
A sequential computer which exploits no parallelism in either the instruction or data streams. Single control unit (CU) fetches single instruction stream (IS) from memory. The CU then generates appropriate control signals to direct single processing element (PE) to operate on single data stream (DS) i.e. one operation at a time.
SIMD (Single instruction stream, multiple data streams)
MISD (Multiple instruction streams, single data stream)
Multiple instructions operate on a single data stream. Uncommon architecture which is generally used for fault tolerance. Heterogeneous systems operate on the same data stream and must agree on the result. Examples include the Space Shuttle flight control computer.
MIMD (Multiple instruction streams, multiple data streams)
Multiple autonomous processors simultaneously executing different instructions on different data. Distributed systems are generally recognized to be MIMD architectures; either exploiting a single shared memory space or a distributed memory space. A multi-core superscalar processor is a MIMD processor.
Diagram comparing classifications
Visually, these four architectures are shown below where each "PU" is a processing unit (of a uni-core or multi-core CPU):
SPMD (Single program, multiple data streams)
Multiple autonomous processors simultaneously executing the same program (but at independent points, rather than in the lockstep that SIMD imposes) on different data. Also referred to as "Single process, multiple data" - the use of this terminology for SPMD is erroneous and should be avoided, as SPMD is a parallel execution model and assumes multiple cooperating processes executing a program. SPMD is the most common style of parallel programming. The SPMD model and the term was proposed by Frederica Darema. Gregory F. Pfister was a manager of the RP3 project, and Darema was part of the RP3 team.
MPMD (Multiple programs, multiple data streams)
Multiple autonomous processors simultaneously operating at least 2 independent programs. Typically such systems pick one node to be the "host" ("the explicit host/node programming model") or "manager" (the "Manager/Worker" strategy), which runs one program that farms out data to all the other nodes which all run a second program. Those other nodes then return their results directly to the manager. An example of this would be the Sony PlayStation 3 game console, with its SPU/PPU processor architecture.
- Flynn, M. J. (September 1972). "Some Computer Organizations and Their Effectiveness". IEEE Trans. Comput. C–21 (9): 948–960. doi:10.1109/TC.1972.5009071.
- Duncan, R. (February 1990). "A survey of parallel computer architectures". Computer 23 (2): 5–4. doi:10.1109/2.44900.
- "Single Program Multiple Data stream (SPMD)". Llnl.gov. Retrieved 2013-12-09.
-  Archived September 1, 2006 at the Wayback Machine
- "CTC Virtual Workshop". Web0.tc.cornell.edu. Retrieved 2013-12-09.
- "NIST SP2 Primer: Distributed-memory programming". Math.nist.gov. Retrieved 2013-12-09.
-  Archived February 3, 2007 at the Wayback Machine
- [dead link]
- "Single program multiple data". Nist.gov. 2004-12-17. Retrieved 2013-12-09.
- Darema, Frederica; George, David A.; Norton, V. Alan; Pfister, Gregory F. (1988). "A single-program-multiple-data computational model for EPEX/FORTRAN". Parallel Computing 7 (1): 11–24. doi:10.1016/0167-8191(88)90094-4.