A frequency synthesizer is an electronic circuit that generates a range of frequencies from a single reference frequency. Frequency synthesizers are used in many modern devices such as radio receivers, televisions, mobile telephones, radiotelephones, walkie-talkies, CB radios, cable television converter boxes, satellite receivers, and GPS systems. A frequency synthesizer may use the techniques of frequency multiplication, frequency division, direct digital synthesis, frequency mixing, and phase-locked loops to generate its frequencies. The stability and accuracy of the frequency synthesizer's output are related to the stability and accuracy of its reference frequency input. Consequently, synthesizers use stable and accurate reference frequencies, such as those provided by a crystal oscillator.
Three types of synthesizer can be distinguished. The first and second type are routinely found as stand-alone architecture: direct analog synthesis (also called a mix-filter-divide architecture as found in the 1960s HP 5100A) and the more modern direct digital synthesizer (DDS) (table-look-up). The third type are routinely used as communication system IC building-blocks: indirect digital (PLL) synthesizers including integer-N and fractional-N. The recently emerged TAF-DPS is also a direct approach. It directly constructs the waveform of each pulse in the clock pulse train.
It is in some ways similar to a DDS, but it has architectural differences. One of its big advantages is to allow a much finer resolution than other types of synthesizers with a given reference frequency.
Time-Average-Frequency Direct Period Synthesis (TAF-DPS)
Recently, a technique named Time-Average-Frequency Direct Period Synthesis (TAF-DPS) emerges as a new member to the frequency synthesizer family. It focuses on frequency generation for clock signal driving integrated circuit. Different from all other techniques, it uses a novel concept of Time-Average-Frequency. Its aim is to address the two long-lasting problems in the field of on-chip clock signal generation: arbitrary-frequency-generation and instantaneous-frequency-switching.
Starting from a base time unit, TAF-DPS first creates two types of cycles TA and TB. These two types of cycles are then used in an interleaved fashion to produce the clock pulse train. As a result, TAF-DPS is able to address the problems of arbitrary-frequency-generation and instantaneous-frequency-switching more effectively. The first circuit technology of utilizing the TAF concept (although subconsciously) is the “Flying-Adder frequency synthesis architecture or“Flying-Adder PLL”, which is developed in late 1990s. Since the introduction of TAF concept in 2008, the development of a frequency synthesis technology that works on TAF formally kicks off. A detailed description of this technology can be found in those books  and this short tutorial. As development progresses, it gradually becomes clear that TAF-DPS is a circuit level enabler for system level innovation. It can be used in many areas other than clock signal generation. Its impact is significant since clock signal is the most important signal in electronics, establishing the flow-of-time inside the electronic world. This profound influence is being seen in this directional change in Moore's Law from space to time.
This section possibly contains original research. Confuses tuning of receiver LO and RF stage (receivers are still adjusted to different channels with variable capacitors); indirect synthesizers are often LC oscillators; there were crystal-controlled receivers (common in WW II); classic CB receiver used switched crystals (possibly partially populated); there were switched double-conversion crystal aircraft radios that tuned hundreds of channels; re "not very stable": there were stable VFO designs; "many orders of magnitude" is vague; for transmitters and receivers, the stability specs are not that demanding; microwave resonators used cavities. (February 2017)
Prior to widespread use of synthesizers, in order to pick up stations on different frequencies, radio and television receivers relied on manual tuning of a local oscillator, which used a resonant circuit composed of an inductor and capacitor, or sometimes resonant transmission lines; to determine the frequency. The receiver was adjusted to different frequencies by either a variable capacitor, or a switch which chose the proper tuned circuit for the desired channel, such as with the turret tuner commonly used in television receivers prior to the 1980s. However the resonant frequency of a tuned circuit is not very stable; variations in temperature and aging of components caused frequency drift, causing the receiver to drift off the station frequency. Automatic frequency control (AFC) solves some of the drift problem, but manual retuning was often necessary. Since transmitter frequencies are stabilized, an accurate source of fixed, stable frequencies in the receiver would solve the problem.
Quartz crystal resonators are many orders of magnitude more stable than LC circuits and when used to control the frequency of the local oscillator offer adequate stability to keep a receiver in tune. However the resonant frequency of a crystal is determined by its dimensions and cannot be varied to tune the receiver to different frequencies. One solution is to employ many crystals, one for each frequency desired, and switch the correct one into the circuit. This "brute force" technique is practical when only a handful of frequencies are required, but quickly becomes costly and impractical in many applications. For example, the FM radio band in many countries supports 100 individual channel frequencies from about 88 MHz to 108 MHz; the ability to tune in each channel would require 100 crystals. Cable television can support even more frequencies or channels over a much wider band. A large number of crystals increases cost and requires greater space.
The solution to this was the development of circuits which could generate multiple frequencies from a "reference frequency" produced by a crystal oscillator. This is called a frequency synthesizer. The new "synthesized" frequencies would have the frequency stability of the master crystal oscillator, since they were derived from it.
Many techniques have been devised over the years for synthesizing frequencies. Some approaches include phase locked loops, double mix, triple mix, harmonic, double mix divide, and direct digital synthesis (DDS). The choice of approach depends on several factors, such as cost, complexity, frequency step size, switching rate, phase noise, and spurious output.
Coherent techniques generate frequencies derived from a single, stable master oscillator. In most applications, a crystal oscillator is common, but other resonators and frequency sources can be used. Incoherent techniques derive frequencies from a set of several stable oscillators. The vast majority of synthesizers in commercial applications use coherent techniques due to simplicity and low cost.
Synthesizers used in commercial radio receivers are largely based on phase-locked loops or PLLs. Many types of frequency synthesizer are available as integrated circuits, reducing cost and size. High end receivers and electronic test equipment use more sophisticated techniques, often in combination.
System analysis and design
A well-thought-out design procedure is considered to be the first significant step to a successful synthesizer project. In the system design of a frequency synthesizer, states Manassewitsch, there are as many "best" design procedures as there are experienced synthesizer designers. System analysis of a frequency synthesizer involves output frequency range (or frequency bandwidth or tuning range), frequency increments (or resolution or frequency tuning), frequency stability (or phase stability, compare spurious outputs), phase noise performance (e.g., spectral purity), switching time (compare settling time and rise time), and size, power consumption, and cost. James A. Crawford says that these are mutually contradictive requirements.
Influential early books on frequency synthesis techniques include those by Floyd M. Gardner (his 1966 Phaselock techniques) and by Venceslav F. Kroupa (his 1973 Frequency Synthesis).
Mathematical techniques analogous to mechanical gear-ratio relationships can be employed in frequency synthesis when the frequency synthesis factor is a ratio of integers. This method allows for effective planning of distribution and suppression of spectral spurs.
Variable-frequency synthesizers, including DDS, are routinely designed using Modulo-N arithmetic to represent phase.
Principle of PLL synthesizers
- See main article: Phase-locked loop
A phase locked loop is a feedback control system. It compares the phases of two input signals and produces an error signal that is proportional to the difference between their phases. The error signal is then low pass filtered and used to drive a voltage-controlled oscillator (VCO) which creates an output frequency. The output frequency is fed through a frequency divider back to the input of the system, producing a negative feedback loop. If the output frequency drifts, the phase error signal will increase, driving the frequency in the opposite direction so as to reduce the error. Thus the output is locked to the frequency at the other input. This other input is called the reference and is usually derived from a crystal oscillator, which is very stable in frequency. The block diagram below shows the basic elements and arrangement of a PLL based frequency synthesizer.
The key to the ability of a frequency synthesizer to generate multiple frequencies is the divider placed between the output and the feedback input. This is usually in the form of a digital counter, with the output signal acting as a clock signal. The counter is preset to some initial count value, and counts down at each cycle of the clock signal. When it reaches zero, the counter output changes state and the count value is reloaded. This circuit is straightforward to implement using flip-flops, and because it is digital in nature, is very easy to interface to other digital components or a microprocessor. This allows the frequency output by the synthesizer to be easily controlled by a digital system.
Suppose the reference signal is 100 kHz, and the divider can be preset to any value between 1 and 100. The error signal produced by the comparator will only be zero when the output of the divider is also 100 kHz. For this to be the case, the VCO must run at a frequency which is 100 kHz x the divider count value. Thus it will produce an output of 100 kHz for a count of 1, 200 kHz for a count of 2, 1 MHz for a count of 10 and so on. Note that only whole multiples of the reference frequency can be obtained with the simplest integer N dividers. Fractional N dividers are readily available.
In practice this type of frequency synthesizer cannot operate over a very wide range of frequencies, because the comparator will have a limited bandwidth and may suffer from aliasing problems. This would lead to false locking situations, or an inability to lock at all. In addition, it is hard to make a high frequency VCO that operates over a very wide range. This is due to several factors, but the primary restriction is the limited capacitance range of varactor diodes. However, in most systems where a synthesizer is used, we are not after a huge range, but rather a finite number over some defined range, such as a number of radio channels in a specific band.
Many radio applications require frequencies that are higher than can be directly input to the digital counter. To overcome this, the entire counter could be constructed using high-speed logic such as ECL, or more commonly, using a fast initial division stage called a prescaler which reduces the frequency to a manageable level. Since the prescaler is part of the overall division ratio, a fixed prescaler can cause problems designing a system with narrow channel spacings – typically encountered in radio applications. This can be overcome using a dual-modulus prescaler.
Further practical aspects concern the amount of time the system can switch from channel to channel, time to lock when first switched on, and how much noise there is in the output. All of these are a function of the loop filter of the system, which is a low-pass filter placed between the output of the frequency comparator and the input of the VCO. Usually the output of a frequency comparator is in the form of short error pulses, but the input of the VCO must be a smooth noise-free DC voltage. (Any noise on this signal naturally causes frequency modulation of the VCO.) Heavy filtering will make the VCO slow to respond to changes, causing drift and slow response time, but light filtering will produce noise and other problems with harmonics. Thus the design of the filter is critical to the performance of the system and in fact the main area that a designer will concentrate on when building a synthesizer system.
Use as a frequency modulator
Many PLL frequency synthesizers can also generate frequency modulation (FM). The modulating signal is added to the output of the loop filter, directly varying the frequency of the VCO and the synthesizer output. The modulation will also appear at the phase comparator output, reduced in amplitude by any frequency division. Any spectral components in the modulating signal too low to be blocked by the loop filter end up back at the VCO input with opposite polarity to the modulating signal, thus cancelling them out. (The loop effectively sees these components as VCO noise to be tracked out.) Modulation components above the loop filter cutoff frequency cannot return to the VCO input so they remain in the VCO output. This simple scheme therefore cannot directly handle low frequency (or DC) modulating signals but this is not a problem in the many AC-coupled video and audio FM transmitters that use this method. Such signals may also be placed on a subcarrier above the cutoff frequency of the PLL loop filter.
PLL frequency synthesizers can also be modulated at low frequency and down to DC by using two-point modulation to overcome the above limitation. Modulation is applied to the VCO as before, but now is also applied digitally to the synthesizer in sympathy with the analog FM signal using a fast delta sigma ADC.
- ^ Popiel-Gorski (1975, p. 25)
- ^ Egan (2000, pp. 14–27)
- ^ Egan (2000, pp. 372–376)
- ^ Xiu, Liming (2008). "The concept of time-average-frequency and mathematical analysis of flying-adder frequency synthesis architecture". IEEE Circuits and Systems Magazine. 8 (3): 27–51. doi:10.1109/mcas.2008.928421. ISSN 1531-636X. S2CID 21809964.
- ^ Xiu, Liming (2012). Nanometer frequency synthesis beyond the phase-locked loop. Hoboken: John Wiley & Sons. ISBN 978-1-118-34795-9. OCLC 797919764.
- ^ Xiu, Liming (2015). From frequency to time-average-frequency : a paradigm shift in the design of electronic system. New York: IEEE Press. ISBN 978-1-119-10217-5. OCLC 908075308.
- ^ Xiu, Liming (2017). "Clock Technology: The Next Frontier". IEEE Circuits and Systems Magazine. 17 (2): 27–46. doi:10.1109/mcas.2017.2689519. ISSN 1531-636X. S2CID 24013085.
- ^ Xiu, Liming (2019). "Time Moore: Exploiting Moore's Law From The Perspective of Time". IEEE Solid-State Circuits Magazine. 11 (1): 39–55. doi:10.1109/mssc.2018.2882285. ISSN 1943-0582. S2CID 59619475.
- ^ Manassewitsch (1987, p. 7)
- ^ a b Manassewitsch (1987, p. 151)
- ^ Manassewitsch (1987, p. 51)
- ^ a b Crawford (1994, p. 4)
- ^ Gardner (1966)
- ^ a b Kroupa (1999, p. 3)
- ^ Phase is the integral of frequency. Controlling the phase will also control the frequency.
- ^ a b c Banerjee (2006)
- ^ Gardner1966
- ^ Owen (2001)
- Banerjee, Dean (2006), PLL Performance, Simulation and Design Handbook (4th ed.), National Semiconductor, archived from the original on 2008-11-21, retrieved 2008-10-20. Also PDF version.
- Crawford, James A. (1994), Frequency Synthesizer Design Handbook, Artech House, ISBN 0-89006-440-7
- Egan, William F. (2000), Frequency Synthesis by Phase-lock (2nd ed.), John Wiley & Sons, ISBN 0-471-32104-4
- Gardner, Floyd M. (1966), Phaselock Techniques, John Wiley and Sons
- Kroupa, Venceslav F. (1999), Direct Digital Frequency Synthesizers, IEEE Press, ISBN 0-7803-3438-8
- Kroupa, Venceslav F. (1973), Frequency Synthesis: Theory, Design & Applications, Griffin, ISBN 0-470-50855-8
- Manassewitsch, Vadim (1987), Frequency Synthesizers: Theory and Design (3rd ed.), John Wiley & Sons, ISBN 0-471-01116-9
- Popiel-Gorski, Jerzy (1975), Frequency Synthesis: Techniques and Applications, IEEE Press, ISBN 0-87942-039-1
- Owen, David (2001), Fractional-N Synthesizers, Microwave Journal
- Xiu, Liming (2012), Nanometer Frequency Synthesis beyond Phase Locked Loop, Aug. 2012, John Wiley IEEE press (IEEE Press Series on Microelectronic Systems), ISBN 978-1-118-16263-7.
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- Ulrich L. Rohde "Digital PLL Frequency Synthesizers – Theory and Design ", Prentice-Hall, Inc., Englewood Cliffs, NJ, January 1983
- Ulrich L. Rohde " Microwave and Wireless Synthesizers: Theory and Design ", John Wiley & Sons, August 1997, ISBN 0-471-52019-5
- Hewlett-Packard 5100A (tunable, 0.01 Hz-resolution Direct Frequency Synthesizer introduced in 1964; to HP, direct synthesis meant PLL not used, while indirect meant a PLL was used)
- Hewlett-Packard (December 1965). Model 5100A Synthesizer (PDF). Operating and Service Manual.
- Hewlett-Packard (August 1965). Model 5110A Synthesizer Driver (PDF). Operating and Service Manual.
- Frequency Synthesizer U.S. Patent 3,555,446, Braymer, N. B., (1971, January 12)
- Oliver, Bernard M. (May 1964). "Digital Frequency Synthesis" (PDF). Hewlett-Packard Journal. 15 (9): 1.
- Van Duzer, Victor E. (May 1964). "A 0-50 Mc Frequency Synthesizer with Excellent Stability, Fast Switching, and Fine Resolution" (PDF). Hewlett-Packard Journal. 15 (9): 1–6.. HP 5100A Direct synthesizer: comb generator; filter, mix, divide. Given 3.0bcd MHz, mix with 24 MHz and filter to get 27.0bcd MHz, mix with 3.a MHz and filter to get 30.abcd MHz; divide by 10 and filter to get 3.0abcd MHz; feed to next stage to get another digit or mix up to 360.abcd MHz and start mixing and filtering with other frequencies in 1 MHz (30–39 MHz) and 10 MHz (350–390 MHz) steps. Spurious signals are -90 dB (p. 2).
- Van Duzer, Victor E. (May 1964). "Notes on the Application of Frequency Synthesizers" (PDF). Hewlett-Packard Journal. 15 (9): 7–8.
- Cutler, Leonard S. (December 1963). "Examination of the Atomic Spectral Lines of a Cesium Beam Tube with the HP Frequency Synthesizer" (PDF). Hewlett-Packard Journal. 15 (4).
- Shanahan, John. C. (December 1971). "Uniting Signal Generation and Signal Synthesis: A simultaneous solution is devised to the problems of signal generation and signal use. while optimizing both for bench and automatic use" (PDF). Hewlett-Packard Journal. 23 (4): 2–13.. HP 8660A/B Multiloop PLL synthesizer.