The GTD-5 EAX (General Telephone Digital Number 5 Electronic Automatic Exchange) is the Class 5 telephone switch developed by GTE Automatic Electric Laboratories. This digital central office telephone circuit switching system is used in the former GTE service areas and by many smaller telecommunications service providers.
- 1 History
- 2 Architecture
- 3 Administration
- 4 Patents
- 5 See also
- 6 References
- 7 External links
The GTD-5 EAX first appeared in Banning, California on June 26, 1982, slowly replacing the electromechanical systems still in use in the independent switch market at that time. The GTD-5 EAX was also used as a Class 4 telephone switch or as a mixed Class 4/5 in markets too small for a GTD-3 EAX or 4ESS switch. The GTD-5 EAX was also exported internationally, and manufactured outside of the U.S. under license, primarily in Canada, Belgium and Italy. By 1988, it had 4% of the worldwide switching market, with an installed base of 11,000,000 subscriber lines. GTE Automatic Electric Laboratories became GTE Network Systems and later GTE Communication Systems. In 1989, GTE sold partial ownership of its switching division to AT&T, forming AG Communication Systems. AG Communication Systems eventually fell under the ownership of Lucent Technologies, and was dissolved as a separate corporate entity in 2003.
The processing building block of the GTD-5 EAX was the "processor complex". These were each assigned a specific function within the overall switch design. In the original generation, Intel 8086 processors were used. These were replaced by NEC V30s (an 80186 instruction set compatible processor with 8086 pinout implemented in CMOS and somewhat faster than the 8086 due to internal improvements) in the second generation, and ultimately by 80386 processors.
- Administrative Processor Complex (APC)
The APC was responsible for the craft interface to the system, administration of status control for all hardware devices, Recent Change, billing, and overall administration.
- Telephony Processor Complex (TPC)
The TPC was responsible for call sequence and state control. It received signalling inputs collected from peripheral processors (see MXU, RLU, RSU, and TCU below) and sent control information back to the peripheral processors.
- Base Processor Complex (BPC)
This term referred collectively to the APC and TPCs. Physically, this distinction made little sense, but was important from a software compilation standpoint. Since the APC and TPC processors shared a large memory-mapped space, some stages of compilation were performed in common.
- Timeswitch and Peripheral Control Unit (TCU)
The TCU was responsible for a group of Facility Interface Units (FIUs). Each FIU was responsible for connecting the system to a particular class of physical connection: analog lines in the Analog Line FIU (and its successor, the Extended Line FIU); analog trunks in the Analog Trunk FIU; and digital carrier in the Digital Trunk FIU and its successor, the EDT FIU. Unlike the SM in the competitive 5ESS Switch, the TCUs did not perform all call processing functions, but limited themselves to digit collection and signalling interpretation.
- Remote Switching Unit (RSU)
The RSU was similar to the TCU, but had a network capable of local switching, and could process calls locally when links to the base unit were severed.
- Remote Line Unit (RLU)
The RLU was a condensed version of the RSU, with no local switching capability and limited line capacity.
- MultipleXor Unit (MXU)
The MXU was actually a Lenkurt 914E Subscriber Loop Carrier. When integrated with the GTD-5 EAX, it used a custom software load that permitted message communication with the remainder of the system.
Most communication within the GTD-5 was performed via direct memory-mapped I/O. The APC and each TPC were each connected to three common memory units. These common memory units each contained 16 megabytes of memory which were allocated to shared data structures, both dynamic structures related to dynamic call data and static (protected) data related to the office database. The APC, TPC, and TCUs all connected to a smaller shared memory, the Message Distribution Circuit (MDC). This was an 8k word 96 port memory that was used to place small packetized messages into software defined queues. The MXU, RLU, and RSU were all sufficiently far from the base unit that they could not participate in the shared memory based communication directly. A special circuit pack, the Remote Data Link Controller (RDLC) was installed in the DT-FIU of the remote unit and its host TCU. This allowed a serial communication link over a dedicated timeslot of a DS1 carrier. The host TCU was responsible for forwarding messages from the remote unit through the MDC.
Two generations of network were available on the GTD-5. The latter network was made available sometime around 2000, but its characteristics are not described in public documentation. The network described in the article is the original network, available from 1982 until approximately 2000.
The GTD-5 EAX ran on a Time-Space-Time (TST) topology. Each TCU contained two timeswitches (TSWs) with a total capacity of 1544 timeslots: 772 in the originating time switch and 772 in the terminating time switch. Four FIUs of 193 timeslots each were connected to the TSW. Trunking FIUs connected 192 timeslots of facility (eight DS1 carriers or 192 individual analog trunks). The original Analog Line FIU had a 768 line capacity with one codec per line. The digital output of the 768 codecs was concentrated to 192 timeslots before presentation to the timeswitch, a 4:1 concentration. In the later 1980s, higher capacity line frames of 1172 and 1536 lines became available, allowing for higher concentration ratios of 6:1 and 8:1.
The Space Switch (SSW) was under the control of the TPCs and APC, which accessed it via the Space Interface Controller (SIC). The SSW was divided into eight Space Switch Units (SSUs). Each SSU could switch all 772 channels between 32 TCUs. The first 32 TCUs connected in sequential order to the first two SSUs. Connecting the two SSUs in parallel this way provided the doubling of network capacity required in a CLOS network. When the system grew beyond 32 TCUs, an additional 6 SSUs were added. Two of these SSUs connected to TCU32-TCU63 in a manner directly analogous to the first two SSUs. Two connected the inputs from TCU0-TCU31 to the output of TCU32-TCU63, while the final two connected the outputs of TCU32-TCU63 to the input of TCU0-TCU31.
The GTD-5, unlike its contemporaries, did not make extensive use of serial line technology. Network communication was based on a 12-bit parallel PCM word carried over cables incorporating parallel twisted pairs. Communication between processors and peripherals was memory mapped, with similar cables extending 18 bit address and data buses between frames.
Analog line FIU (AL-FIU)
The AL-FIU contained 8 simplex groups of 96 lines each, referred to as Analog Line Units (ALUs), controlled by a redundant controller, the Analog Control Unit (ACU). The 96 lines within each ALU were housed on 12 circuit packs of eight line circuits. These 12 circuit packs were electrically grouped into four groups of three cards, where each group of three cards shared a serial 24 timeslot PCM group. The timeslot assignment capabilities of the codec were used to manage timeslots within the PCM group. The ACU contained a timeslot selection circuit that could select the same timeslot from up to eight PCM groups, (i.e. network timeslot 0-7 would select PCM timeslot 0, network timeslot 8-15 would select PCM timeslot 1, etc., giving eight opportunities for PCM timeslot 0 to connect to network). Since the same timeslot could be selected only eight times out of thirty-two possible candidates, the overall concentration was four to one. A later generation expanded the number of ALUs to twelve or sixteen, as appropriate, giving larger effective concentration.
Analog trunk FIU (AT-FIU)
The AT-FIU was a repackaged AL-FIU. Only two simplex groups were supported, and the trunk cards carried four circuits instead of eight. PCM groups were six cards wide instead of three. Since two simplex groups provided a total of 192 trunks, the AT-FIU was unconcentrated, as trunk interfaces demand.
Digital trunk FIU (DT-FIU)
T-carrier spans were terminated, four per card, on the Quad Span Interface Circuit (QSIC) in Digital Trunk Facility Interface Units (DTUs). Two QSICS were equipped per copy. providing for an eight DS1 capacity. The span interface circuits were completely redundant, and all control circuitry operated in lockstep between the two copies. This arrangement provided for excellent failure detection but was plagued by design flaws in the earliest versions. Corrected versions of the design were not widely available until the early 1990s. The later generation Extended Digital Trunk Unit (EDT) included 8 T-carriers per card, and incorporated ESF and PRI interfaces. This FIU operated also operated in lockstep between the two copies, but incorporated a small backplane mounted "fingerboard" to house the transformer circuit.
Throughout its lifecycle, the GTD-5 EAX incorporated a quad-redundant processor architecture. The main processor complex of the APC, TPC, TCU, RLU, and RSU all consisted of a pair of processor cards, and each of those processor cards contained a pair of processors. The on-card pair of processors executed precisely the same sequence of instructions, and the output of the pair were compared each clock cycle. If the results were not identical, the processors were immediately reset, and the pair of processors on the other card were brought online as the active processor complex. The active processor always kept memory up-to-date so that when these forced switches occurred, little data loss was suffered. When the switch was requested as a part of routine maintenance, the switch could be accomplished with no data loss at all.
The GTD-5 EAX was programmed in a custom version of Pascal. This Pascal was extended to include a separate data and type compilation phase, known as the COMPOOL (Communications Pool). By enforcing this separate compilation phase, strict typing could be enforced across separate code compilation. This allowed type checking across procedure boundaries and across processor boundaries.
A small subset of code was programmed in 8086 assembly language. The assembler used had a preprocessor that imported identifiers from the COMPOOL, allowing type compatibility checking between PASCAL and assembly.
The earliest peripherals were programmed in the assembly language appropriate to each processor. Eventually, most peripherals were programmed in variations of C and C++.
The system is administered through an assortment of teletypewriter "Channels" (also called the system console). Various outboard systems have been connected to these channels to provide specialized functions.
The following is a non-exhaustive list of U.S. patents applicable to the GTD-5 EAX design
- 4569017 Duplex central processing unit synchronization circuit
- 4757494 Method of Generating Additive Combinations for PCM voice samples
- 4835767 Additive PCM speaker circuit for a time shared conference arrangement
- 4466093 Time Shared Conference Arrangement
- 4406005 Dual Rail Time Control Unit for a T-S-T Digital Switching System
- 4509169 Dual rail network for a remote switching unit
- 4466094 Data capture arrangement for a conference circuit
- 4740960 Synchronization arrangement for time multiplexed data scanning circuitry
- 4580243 Circuit for duplex synchronization of asynchronous signals
- 4466092 Test data insertion arrangement for a conference circuit
- 4740961 Synchronization circuitry for duplex digital span equipment
- 5226121 Method of bit rate de-adaption using the ECMA 102 protocol
- 4532624 Parity checking arrangement for a remote switching unit network
- 4509168 Digital remote switching unit
- 4514842 T-S-T-S-T Digital switching network
- 4520478 Space Stage Arrangement for a T-S-T Digital Switching System
- 4524441 Modular Space Stage Arrangement for a T-S-T Digital Switching System
- 4524422 Modularly Expandable Space Stage for a T-S-T Digital Switching System
- 4525831 Interface Arrangement for Buffering Communication information between stages of T-S-T switch
- 5140616 Network independent clocking circuit which allows a synchronous master to be connected to a circuit switched data adapter
- 4402077 Dual rail time and control unit for a duplex T-S-T-digital switching system
- 4468737 Circuit for extending a multiplexed address and data bus to distant peripheral devices
- 4374361 Clock failure monitor circuit employing counter pair to indicate clock failure within two pulses
- 4399534 Dual rail time and control unit for a duplex T-S-T-digital switching system
- 4498174 Parallel cyclic redundancy checking circuit
- 1ESS switch
- 4ESS switch
- 5ESS switch
- DMS-100 exchange
- Class 5 telephone switch
- Hardware Information Navigational Tool (HINT)
- Telephone exchange
- "100 Years of Telephone Switching",Robert J. Chapuis, A. E. Joel, Jr., Amos E. Joel,p. 392
- Electronic Materials Handbook, Merrill L. Minges, ASM International Handbook Committee, pg. 384, table 1.
- "100 Years of Telephone Switching",Robert J. Chapuis, A. E. Joel, Jr., Amos E. Joel,p. 391
- "100 Years of Telephone Switching",Robert J. Chapuis, A. E. Joel, Jr., Amos E. Joel,p. 51