Gracemont (microarchitecture)

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Gracemont
General information
LaunchedNovember 4, 2021; 9 months ago (November 4, 2021)[1]
Marketed byIntel
Designed byIntel
Common manufacturer(s)
Performance
Max. CPU clock rate700 MHz to 4.0 GHz
Cache
L1 cache96 KB per core (64 KB instructions + 32 KB data)
L2 cache2 or 4 MB per module
L3 cache3 MB per module
Architecture and classification
Technology nodeIntel 7 (previously known as 10ESF)
Architecturex86-64
Instruction setx86-64
Extensions
Physical specifications
Cores
  • 4 per module
Products, models, variants
Product code name(s)
History
PredecessorTremont
SuccessorCrestmont

Gracemont is a microarchitecture for low-power processors used in systems on a chip (SoCs) made by Intel, and is the successor to Tremont. Like its predecessor, it is also implemented as low-power cores in a hybrid design of the Alder Lake and Raptor Lake processors.[2]

Design[edit]

Gracemont is the 4th generation out-of-order low-power Atom microarchitecture, built on the Intel 7 manufacturing process.

The Gracemont microarchitecture has the following enhancements over Tremont:[3][4]

  • Level 1 cache per core:
    • 8-way-associative 64 KB instruction cache
    • 8-way-associative 32 KB data cache
  • DDR5 memory
  • PCI Express 5.0 support
  • Support for AVX, AVX2, FMA3 and AVX-VNNI instructions[5]

Technology[edit]

Gracemont block diagram

Products[edit]

The microarchitecture is used as the high-efficiency cores of the twelfth generation of Intel Core hybrid processors (codenamed "Alder Lake").

The microarchitecture is used as the high-efficiency cores of the 13th generation of Intel Core hybrid processors (codenamed "Raptor Lake").

Processors for base transceiver stations (Grand Ridge)[edit]

See also[edit]

References[edit]

  1. ^ Cutress, Dr. Ian. "Intel 12th Gen Core Alder Lake for Desktops: Top SKUs Only, Coming November 4th". www.anandtech.com.
  2. ^ Ian Cutress. "Intel Alder Lake: Confirmed x86 Hybrid with Golden Cove and Gracemont for 2021". AnandTech.
  3. ^ "Gracemont - Microarchitectures - Intel".
  4. ^ a b c Cutress, Ian; Frumusanu, Andrei (2021-08-19). "Intel Architecture Day 2021: Alder Lake, Golden Cove, and Gracemont Detailed". AnandTech. Retrieved 2021-08-25.
  5. ^ Anton Shilov. "Intel's Upcoming Gracemont Microarchitecture to Support AVX, AVX2, and AVX-VNNI". Tom's Hardware.
  6. ^ https://fuse.wikichip.org/news/5946/intel-2021-process-technology-update/