IBM System/4 Pi

From Wikipedia, the free encyclopedia
  (Redirected from IBM AP-101)
Jump to: navigation, search
The IBM AP-101S Space Shuttle General Purpose Computer is a member of the System/4 Pi family

The IBM System/4 Pi is a family of avionics computers used, in various versions, on the F-15 Eagle fighter, E-3 Sentry, AWACS, Harpoon Missile, NASA's Skylab, MOL, and the Space Shuttle, as well as other aircraft. It descends from the approach used in the System/360 mainframe family of computers in that members of the family were intended for use in many varied user applications. Previously custom computers had been designed for each aerospace application which was extremely costly.

The Skylab space station employed the model TC-1,[1] which had a 16-bit word length and 16,384 words of memory with a custom input/output assembly.[2]

The top-of-the-line 4 Pi is the AP-101, used in the AWACS. The U.S. Navy used a similar variant, the AN/ASQ-155, in the carrier based A-6E/A-6E TRAM medium attack aircraft. The Shuttle is controlled by five AP-101 computers, three of which are arranged in a Triple Modular Redundant configuration, one was kept powered up as a "hot spare" and one was maintained powered down as a redundant "cold spare".

The name of the system is derived from the fact that the angular measure of a complete sphere (solid angle) is 4π steradians,[3] while the angular measure of a complete circle is 360 degrees; hence System/4 Pi and System/360. This implies that System/4 Pi is a version of the IBM System/360 for the three-dimensional world of avionics. This was only for marketing purposes because neither the electronics, architecture nor software were related to the IBM commercial 360 line.

AP-101[edit]

The AP-101, being the top-of-the-line of the System/4 Pi range, shares its general architecture with the System/360 mainframes.[4] It has 16 32-bit registers, and uses a microprogram to define an instruction set of 154 instructions. Originally only 16 bits were available for addressing memory; later this was extended with four bits from the program status word register, allowing a directly addressable memory range of 1M locations. This avionics computer has been used in the U.S. Space Shuttle, the B-52 and B-1B bombers,[4] and other aircraft. It is a repackaged version of the AP-1 used in the F-15 fighter.[5] When it was designed, it was a high-performance pipelined processor with core memory. While today its specifications are exceeded by most of the modern microprocessors, it was considered high-performance for its era as it could process 480,000 instructions per second (compared to the 7,000 instructions per second of the computer used on Gemini spacecraft).[4] It remains in service (formerly on the Space Shuttle) because it works and is flight-certified, whereas a new certification would be too expensive. The Space Shuttle AP-101s were augmented by glass cockpit technology.

The B-1B bomber employed a network of eight model AP-101F computers.[6]

Semiconductor memory board from an IBM AP-101S Space Shuttle General Purpose Computer.

The AP-101B originally used in the Shuttle had core memory. The AP-101S upgrade in the early 1990s used semiconductor memory.[7] Each AP-101 on the Shuttle was coupled with an Input-Output Processor (IOP), consisting of one Master Sequence Controller (MSC) and 24 Bus Control Elements (BCEs). The MSC and BCEs executed programs from the same memory system as the main CPU, offloading control the Shuttle's serial data bus system from the CPU.

The Space Shuttle used five AP-101 computers as general-purpose computers (GPCs). Four operated in sync, for redundancy, while the fifth was a backup running software written independently. The Shuttle's guidance, navigation and control software was written in HAL/S, a special-purpose high-level programming language, while much of the operating system and low-level utility software was written in assembly language. AP-101s used by the US Air Force are mostly programmed in JOVIAL, such as the system found on the B-1B Lancer bomber.[8]

References[edit]

  1. ^ Jenkins, Dennis (April 5, 2001). "Advanced Vehicle Automation and Computers Aboard the Shuttle". NASA History Homepage. NASA. Retrieved 27 October 2013. 
  2. ^ "Skylab Space Station". eoPortal. ESA. Retrieved 27 October 2013. 
  3. ^ Technical Description of IBM System/4 Pi Computers. Owego, NY: Federal Systems Division of IBM. 1967. Retrieved 27 October 2013. 
  4. ^ a b c Computers in Spaceflight: The NASA Experience - Chapter Four - Computers in the Space Shuttle Avionics System - The DPS hardware configuration
  5. ^ Computers in Spaceflight: The NASA Experience - Chapter Four - Computers in the Space Shuttle Avionics System
  6. ^ Stormont, D.P.; Welgan, R. (23–27 May 1994). "Risk management for the B-1B computer upgrade". Proceedings of National Aerospace and Electronics Conference (NAECON'94). 2: 1143–1149. doi:10.1109/NAECON.1994.332913. 
  7. ^ Norman, P. Glenn (1987), "The new AP101S General-Purpose Computer (GPC) for the Space Shuttle", IEEE Proceedings, 75 (3): 308–319, doi:10.1109/PROC.1987.13738 
  8. ^ Jovial to smooth U.S. Air Force shift to Ada. (processing language)

Bibliography[edit]

External links[edit]