||It has been suggested that this article be merged into IBM System/4 Pi. (Discuss) Proposed since October 2013.|
The IBM AP-101 is an avionics computer that has been used in the U.S. Space Shuttle, the B-52 and B-1B bombers, and other aircraft. It is a repackaged version of the AP-1 used in the F-15 fighter. When it was designed, it was a high-performance pipelined processor with core memory. While today[update] its specifications are exceeded by most of the modern microprocessors, it was considered high-performance for its era as it could process 480,000 instructions per second (compared to the 7,000 instructions per second of the computer used on Gemini spacecraft). It remains in service (formerly on the space shuttle) because it works and is flight-certified, whereas a new certification would be too expensive. The Space Shuttle AP-101s were augmented by glass cockpit technology.
The AP-101, being the top-of-the-line of the System/4 Pi range, shares its general architecture with the System/360 mainframes. It has 16 32-bit registers, and uses a microprogram to define an instruction set of 154 instructions. Originally only 16 bits were available for addressing memory; later this was extended with four bits from the program status word register, allowing a directly addressable memory range of 1M locations.
The B-1B bomber employed a network of eight model AP-101F computers.
The AP-101B originally used in the Shuttle had core memory. The AP-101S upgrade in the early 1990s used semiconductor memory. Each AP-101 on the Shuttle was coupled with an Input-Output Processor (IOP), consisting of one Master Sequence Controller (MSC) and 24 Bus Control Elements (BCEs). The MSC and BCEs executed programs from the same memory system as the main CPU, offloading control the Shuttle's serial data bus system from the CPU.
The space shuttle used five AP-101 computers as "general-purpose computers" (GPCs). Four operated in sync, for redundancy, while the fifth was a backup running software written independently. The shuttle's guidance, navigation and control software was written in HAL/S, a special-purpose high-level programming language, while much of the operating system and low-level utility software was written in assembly language. AP-101s used by the US Air Force are mostly programmed in JOVIAL, such as the system found on the B-1B Lancer bomber.
- Computers in Spaceflight: The NASA Experience - Chapter Four - Computers in the Space Shuttle Avionics System - The DPS hardware configuration
- Computers in Spaceflight: The NASA Experience - Chapter Four - Computers in the Space Shuttle Avionics System
- Stormont, D.P.; Welgan, R. (23–27 May 1994). "Risk management for the B-1B computer upgrade". Proceedings of National Aerospace and Electronics Conference (NAECON'94) 2: 1143–1149. doi:10.1109/NAECON.1994.332913.
- Norman, P. Glenn (1987), "The new AP101S General-Purpose Computer (GPC) for the Space Shuttle", IEEE Proceedings 75 (3): 308–319, doi:10.1109/PROC.1987.13738
- Jovial to smooth U.S. Air Force shift to Ada. (processing language)
- Vandling, Gilbert C. Organization of a Microprogrammed Aerospace Computer. Computer Design, pp. 65–72, February 1975.
- NASA description of shuttle GPCs
- NASA history of AP-101 development
- Space Shuttle Computers and Avionics