ICT 1900 series
ICT 1900 was a family of mainframe computers released by International Computers and Tabulators (ICT) and later International Computers Limited (ICL) during the 1960s and 1970s. The 1900 series was notable for being one of the few non-American competitors to the IBM System/360, enjoying significant success in the European and British Commonwealth markets.
|Branching||Comparison, carry, overflow, indexing, counting|
|Page size||1024 words (1904A/S, 1906A/S, 1903T)|
|Extensions||extended floating point on 1906/7|
|General purpose||8 24-bit (3 usable for indexing)|
|Floating point||1 48-bit (96-bit if the extended floating point is present)|
In early 1963, ICT was engaged in negotiations to buy the computer business of Ferranti. In order to sweeten the deal, Ferranti demonstrated to ICT the Ferranti-Packard 6000 (FP6000) machine, which had been developed by its Canadian subsidiary Ferranti-Packard, to a design known as Harriac that had been initiated in Ferranti by Harry Johnson and fleshed out by Stanley Gill and John Iliffe.
The FP6000 was an advanced design, notably including hardware support for multiprogramming. ICT considered using the FP6000 as their medium-sized processor in the 1965–1968 timeframe, replacing the ICT 1302. Another plan being considered was to license a new range of machines being developed by RCA, probably compatible with the expected IBM 8000.
The initial 1900 range did not suffer from the many years of careful planning behind the IBM 360.
-- Virgilio Pasquali
On 7 April 1964 IBM announced the System/360 series, a family of compatible machines spanning nearly the complete range of customer needs. It was immediately obvious that ICT would need a coherent response. Two paths were available: develop a range of machines based on the FP6000, using the flexibility of its design to produce smaller or larger machines, or cooperate with RCA who were re-targeting their development to a System/360 compatible range to be known as the RCA Spectra 70.
One major consideration was that the FP6000 was already running, while the RCA Spectra range would take some years to become available. In the end, the decision was made to go with a range of machines based on the FP6000. The centrepiece of the new range was the ICT 1904, a version of the FP6000 with the ICT standard peripheral interface. For higher-end machines, a new larger processor, the ICT 1906, was to be developed by the ICT West Gorton unit (formerly part of Ferranti). To meet the needs of smaller customers, smaller machines, the ICT 1901 and ICT 1902/3, were developed by the ICT Stevenage unit, based on the PF182 and PF183 processors already in development.
On 29 September 1964 the ICT 1900 range was announced in a filmed presentation, scripted by Antony Jay. The following week two working systems were demonstrated at the Business Equipment Exhibition, Olympia.
The first commercial sale was made in 1964 to the Morgan Crucible Company, comprising a 16K word 1902 with an 80-column 980-card/minute reader, a card punch, a 600 line/min printer and 4 x 20kchar/s tape drives[nb 1]. It was soon upgraded to a 32K word memory and a floating point unit to allow for some scientific work. The same company had also been the first to order ICT's first computer, the HEC4 (later ICT 1201), in 1955.
The first system delivered was a 1904, for the Northampton College of Advanced Technology, London in January 1965.
The ICT 1900 was a word-addressing machine using a register-to-memory architecture with eight accumulator registers. Three of the accumulators could be used as modifier (index) registers. The word length was 24 bits, which could be used as four six-bit characters; instructions were provided for copying single characters to and from memory.
The accumulators were addressable as if they were the first eight words of memory, giving the effect of register-to-register instructions with no extra operation codes being needed. The hardware registers were an optional feature, and if not fitted the accumulators were the first eight words of memory. The large number of optional features in the FP6000 design gave ICT great flexibility in pricing.
A notable feature of the series was the hardware support for running multiple processes – every process ran in an independent address space, enforced by datum and limit registers. No user process could access the memory of any other process. Later models added paging hardware, allowing true virtual memory with the GEORGE 4 operating system.
On the original models the address size was 15 bits, allowing up to 32K words of memory. Later models added 22-bit addressing, allowing a theoretical 4Mword maximum memory. Instructions contained a 12-bit operand, either fixed or offset from an index register. Branch instructions held a 15-bit offset, allowing access to all memory on the initial range. When the address size was increased to 22 bits, replaced (indirect) and relative branches were added to the instruction set to allow access to the larger address space.
The largest change between the original FP6000 and the 1900 series was the inclusion of the ICT standard interface for connection of peripherals. This allowed connection of any ICT peripheral to any processor of the series, and owners could upgrade their processors while keeping the same peripherals or vice versa.
All I/O operations were initiated by a privileged supervisor process, known as the executive. User processes communicated with the executive using extracodes, instructions that caused a trap into the executive. The executive would then communicate with the appropriate peripheral via the Standard Interface, using functions not available to user processes. The subsequent data transfers would then occur across this interface, autonomously without further program involvement. The conclusion of the transfers (or error if any) would similarly be indicated back to the executive.
On smaller members of the series, some expensive instructions (floating point for example) were also implemented as extracodes. The combination of the executive and hardware provided the same interface to programs running on any model of the range.
The hardware floating-point unit, if fitted, ran autonomously. After a floating-point operation was started, integer instructions could be run in parallel until the result of the floating-point operation was needed.
The instruction set supported the following data formats:
- A 24-bit word could hold four six-bit characters.
- Counter modifier, also known as an index word
- A 9-bit counter and a 15-bit modifier (address) field. A loop instruction decremented the counter and incremented the address either by 1 or 2.
- This format was only available in 15-bit addressing mode. In 22-bit mode the counter and address were kept in separate words.
- Character counter modifier, also known as a character index word
- Two-bit character offset, seven-bit counter and 15-bit modifier (word address). The BCHX (branch on character indexing) instruction decremented the counter and incremented the character offset, incrementing the word address if the character offset overflowed, branching if the count had not reached zero.
- In 22-bit addressing mode the counter was unavailable, and the format was a two-bit character offset and a 22-bit word address. The BCHX instruction incremented the character offset, incremented the word address if the character offset overflowed, and branched unconditionally.
- Single-length integer
- Multi-length integer
- The first word held a 24-bit two's complement signed number, subsequent words held 23-bit extensions with the high bit used for internal carry.
- Single-length floating point number
- Two words holding a 24-bit signed argument (mantissa) and a nine-bit exponent.
- Double-length floating-point number
- Two words holding a 38-bit signed argument and a nine-bit exponent.
- Quadruple-length floating-point number
- Four words holding a 75-bit signed argument and a nine-bit exponent.
- Handled in software on all but 1906/7 processors with the extended floating-point feature.
In order to deal with data on paper tape or from communications equipment, a system of shifts could be used to represent the full 128 characters of ASCII. Character #74 (i.e. octal 74) was considered an alpha shift and indicated subsequent characters were to be considered uppercase, #75 was a beta shift and indicated subsequent characters were in lower case, and #76 the delta shift, indicating the next character was a control character. Thus the ASCII string "Hello World" would be encoded as "
αHβELLO αWβORLD". Character #77 was a fill (ignore) character, similar to the rubout character in the 7-bit world.
Comparison with System/360
Both the 1900 series and IBM System/360 provided hardware support for multi-programming. On the 1900, all user memory addresses were modified by a datum (base address) register and checked against a limit register, preventing one program interfering with another. The System/360 gave each process and every 2048-byte block of memory a four-bit key, and if a process key did not match the memory block key an exception would result. The 1900 system required programs to occupy a contiguous area of memory but allowed processes to be relocated during execution, simplifying the work of the operating system. The 1900 also allowed any process direct access to the first 4096 words of its address space. (Both the 1900 and 360 had a 12-bit operand field, but on the 360 addresses were physical addresses so a program could directly access the first 4096 bytes of physical memory).
The System/360 had the advantage of a larger word and character size; its 32-bit words were large enough for (low accuracy) floating point numbers whereas the 1900 needed at least two words. The eight-bit byte of the System/360 allowed manipulation of lowercase characters without the complex shift sequences of the 1900. However, in the early days the smaller word size of the 1900 was seen as a cost advantage, as the memory could be 25% cheaper for the same number of words.
The initial range of machines was:
- ICT 1901
- A very small machine with a 6-bit wide mill (arithmetic unit). For compatibility with the other machines a 24-bit operation was performed by the processor as four 6-bit operations. Based on the PF183 developed by ICT Stevenage. The 1901 was announced and released after the other members of the initial range, in response to the IBM System/360 Model 20, and was a great success.
- ICT 1902
- A small machine. Based on the ICT Stevenage PF182 processor.
- Like the 1901 the 1902 performed multiply and divide operations as extracodes. An optional commercial computing facility or CCF was available to add hardware multiply and divide. An optional floating point unit, the scientific computing facility, SCF was also available as a super-set of the CCF.
- ICT 1903
- The same processor as the 1902, but with 2µs core in place of the 6µs core supplied with the 1902.
- ICT 1904
- The ICT West Gorton processor derived from the FP6000 with the addition of the ICT standard interface.
- ICT 1905
- A 1904 with an autonomous hardware floating point unit.
- ICT 1906
- A new processor designed by ICT West Gorton with a 48-bit wide memory pathway and a 22-bit addressing mode. Delivered with up to 256Kwords of memory.
- ICT 1907
- A 1906 with a floating point unit.
- ICT 1909
- A machine similar to the 1905 but with a slow 6µs store comparable to the 1902. Designed for Universities who needed floating point but found the 1905 too expensive.
The execution time for an addition instruction ("add the contents of store location x to register y") ranged from 2.5 μs for a 1906 or 1907 with 1.1 μs core store, to 34 μs for a 1901 with 6 μs core store.
All machines except the 1901 were operated from a modified Teletype Model 33 ASR used to give commands to the executive. The 1901 was operated from console switches, with a console available as an optional extra.
A range of peripherals was available, including 80-column card punches and readers, 8 track paper tape punches and readers and solid barrel line printers. Data could be stored on half-inch magnetic tape. Magnetic disk storage became available in 1966.
The 1900 E/F series
In 1968 ICT introduced the E series machines:
- ICT 1904E
- Some improvements were made to the original 1904 and the new 22-bit addressing mode developed for the 1906 was made available.
- ICT 1905E
- The 1904E with a floating point unit.
- ICT 1906E
- The original 1906 had not been as fast as hoped, therefore the new top of the range machines were actually dual-processor versions of the 1904E.
- ICT 1907E
- A 1906E with a special higher performance floating point unit.
Improvements to the memory subsystems of these machines, replacing the 1.8µs core with 0.75µs core, were introduced as the F series.
1900 A series
In 1969 the 1900 A series was delivered, replacing the remaining machines from the initial series and the E/F machines. The original discrete germanium semiconductor implementations were replaced by Texas Instruments 7400 series TTL integrated circuits in most of the range and Motorola MECL 10K ECL integrated circuits in the new 1906A (which was based on the original 1906 rather than the dual processor 1904 of the 1906E/F). There was a proposal to build a multiprocessor version of the 1906A, the 1908A (known internally as Project 51), which would allow ICL to compete with the large CDC and IBM machines in Universities and research centers but it was eventually abandoned in favor of accelerating work on the New Range which was being designed to replace both the 1900 series and the ICL System 4.
With the A series a hardware floating point unit was made an optional feature of all machines, instead of having a different model number for floating point equipped machines.
The 22-bit addressing mode and extended branch mode introduced by the 1906 was extended to the 1902A and 1903A, but not the much smaller 1901A.
ICL introduced a paging unit to the higher end machines (1904A, 1906A) and a new version of the GEORGE operating system, GEORGE 4 which was compatible with GEORGE 3 but used paged virtual memory in place of the simple base/limit system of the earlier machines.
- ICL 1901A
- Deliveries started in 1969.
- ICL 1902A
- Deliveries started in 1969.
- ICL 1903A
- Deliveries started in 1969.
- ICL 1904A
- First deliveries in 1970.
- The 1904A had an optional paging unit and so could run GEORGE 4.
- ICL 1906A
- First deliveries in 1970.
- The 1906A had a paging unit and so could run GEORGE 4.
The 1900 S series
In April 1971 ICL announced the S series of machines, replacing the core store of the earlier machines with semiconductor memory in most of the range and very fast Plessey nickel plated wire memory for the top of the range 1906S.
- ICL 1901S
- 4µs semiconductor store
- ICL 1902S
- 3µs semiconductor store
- ICL 1903S
- 1.5µs semiconductor store
- ICL 1904S
- ICL 1906S
- First delivery in 1973. Nickel plated wire memory with a 250ns cycle speed.
1900 T series
As the larger models of the new range were being introduced it was decided that the lower models of the 1900 range were becoming uncompetitive. To refresh the range new models were released. In each case the model was simply based on the next higher model of the previous range, the 1903T being based on the 1904S for example.
- ICL 1901T
- Delivery started in 1974. The 1901T was based on the 1902S with an integrated disk controller and VDU controller added to the processor cabinet to reduce space.
- ICL 1902T
- Delivery started in 1974. The 1902T was based on the 1903S with an integrated disk controller and integrated VDU controller.
- ICL 1903T
- Delivery started in 1973. As the 1903T was based on the 1904S it was available with a paging unit and could run George 4. The processor clock and memory cycle time were slower than the 1904S, allowing the use of cheaper parts. The 1903T was built at the ICL West Gorton site.
In 1969 IBM had introduced the System/3 entry-level machine, which began to cut into sales of the ICL 1901 and 1902 models. To recapture the market, an ICL project known internally as PF73 was started, based on an ICL Stevenage-developed microprogrammed machine known as MICOS-1, which came to market in 1973 as the ICL 2903 and 2904. Despite their New Range numbering, these machines used the ICL 1900 instruction set and ran 1900 software, although a microprogram was available that provided an IBM-360 instruction set to allow them to run IBM software. The 2903/2904 were released with an RPG compiler to better compete with System/3. It was a commercial success and almost 3000 machines were sold.
An EMMY processor emulating the IBM 360 order code was estimated to be around the speed of an IBM System/360 Model 50, implying that the ME29 was faster than the original ICT 1904, approaching the speed of the ICT 1906.
In an effort to increase sales to ICL customers, and to profit from the difficulties ICL were having moving customers from the 1900 to the New Range, IBM introduced a microcode package for the 370/145 allowing execution of 1900 series programs.
Odra 1300 series
The Odra 1300 series (Odra 1304, Odra 1305 and Odra 1325) were a range of 1900 compatible machines built by Elwro in Wrocław, Poland between 1971 and 1978. By agreement with ICL the Odra machines ran standard ICL software (executive E6RM, George 3).
ICL 2900 (New Range) systems
Second generation "S3E" (microcoded) versions of the larger New Range systems (such as the 2960/2966 from West Gorton, and the later 2940/50 from Stevenage), could run 1900 series code under DME (Direct Machine Environment) as an emulation as well as the New Range instruction set under the newer VME (Virtual Machine Environment). Later CME (Concurrent Machine Environment) microcode was developed, which allowed DME and VME to co-exist (and run) concurrently on the same platform, similar to the functionality offered by virtualisation software such as VMware today.
The FP6000 ran under the control of operators executive, a simple operating system that allowed the operator using the system console to load programs from magnetic tape, cards or paper tape, allocate peripherals to programs and attribute priorities to running programs. Executive performed all the I/O operations on behalf of user programs, allowing allocation of different peripherals as needed.
Despite its simplicity executive was, for the time, quite powerful, allocating memory to programs as needed (rather than the fixed partitions provided by OS/360). This was possible because the FP6000 design contained hardware to aid multi-programming, datum and limit registers which made programs address independent and avoided one program accessing the memory allocated to another.
To allow more efficient use of peripherals, as well running multiple programs simultaneously, executive allowed a limited multi-threading within programs (each program could be split into up to four sub-programs, sharing the same address space, which were also time shared. While one sub-program was waiting for peripheral activity another could continue processing).
An extended version of the FP6000 executive was provided with the ICT 1904/1905, and new versions were written for the ICT 1906/7 and ICT 1901/2/3. An important task of these different versions was to hide the hardware differences between the different machines, providing emulation of missing instructions as extracodes. The concept was that applications, and later operating systems, were written to run on the combination of the hardware and the executive, and so would run on any member of the series, no matter how different the underlying hardware was.
With the introduction of magnetic disk systems executive became more complex, using overlaying to reduce its memory footprint. Disk based executives included features to simplify disk operations, handling file management (creation, renaming, deletion, resizing) on behalf of user programs. Files were identified by 12 character names and a user program did not need to know which physical disk was being used for a file.
In December 1964, ICT set up an Operating Systems Branch to develop a new operating system for the 1906/7. The branch was initially staffed with people being released by the end of work on the OMP operating system for the Ferranti Orion. The initial design of the new system, named George in part after George E. Felton,[nb 2] head of the Basic Programming Division, was based on ideas from the Orion and the spooling system of the Atlas computer.  The initial versions, George 1 (for the ICT 1901, 1902 and 1903 machines) was a simple batch processing system. Job descriptions were read in from cards or paper tape, peripherals and magnetic tape files were dynamically allocated to the job which was then run, producing output on the line printer.
George 2 added the concept of spooling. Jobs and input data were read in from cards or paper tape to an input well on disk or tape. The jobs were then run, writing output to disk or tape spool files, which were then written to the output peripherals. The input/processing/output stages were run in parallel, increasing machine utilisation. On larger machines it was possible to run multiple jobs simultaneously.
George 1 and 2 ran as simple programs under executive (with trusted status that allowed them to control user programs). George 3 was a complete operating system in itself, it used a much reduced executive responsible only for handling low level hardware access. George 3 implemented both batch processing and Multiple online programming (MOP) – interactive use from terminals.
Minimop and Maximop
The compilers were released in various versions, of increasing sophistication. Initially paper tape and cards were used for input and output; later magnetic tape and finally disk files. The first versions of the compilers ran in very limited space, starting around 4K words for PLAN and NICOL and as little as 16K words for FORTRAN and ALGOL. Later versions for the George 3 and 4 operating systems expanded to sizes as large as 48K words.
Other languages available included:
- PLASYD – an alternative assembly language modeled on PL/360, much used by the Atlas Computer Laboratory.
- NICOL – the NIneteen Hundred COmmercial Language. A simple report generation language in the RPG vein, much used on the small 1901 replacing card tabulator systems.
- JEAN – a dialect of JOSS, a conversational language similar in capabilities to BASIC.
- SOBS – the Southampton BASIC System.
- POP-2 – from the University of Edinburgh, a stack-based list-processing language.
- ALGOL 68R – the Royal Radar Establishment wrote one of the first Algol 68 compilers for the 1900.
- Pascal – Queen's University Belfast initially ported the CDC Pascal compiler to the 1900, then wrote a completely new and well-engineered replacement.
- FORTRAN 77 – the University of Salford produced a FORTRAN 77 compiler for George 3. It was unusual in that it used 8-bit characters and the ASCII character set internally. Silverfrost FTN95, a Fortran 95 compiler for Windows is a distant descendant.
- BCPL – Bernard Sufrin ported Martin Richards's IBM 360 compiler to the 1900 architecture in mid-1969 at Essex University. BCPL is antecedent of C.
Like many contemporary machines much application software was bundled with the basic system, including the compilers and utility programs. Other software was available as paid options from ICT or other sources, including such exotic packages as Storm Sewer Design and Analysis.
SCAN– Stock control system (Acronym: Stock Control and Analysis on Nineteen-hundred)
PERT– Project management system (Acronym: Project Evaluation and Review Technique)
PROSPER– Financial planning system (not the forerunner of today's spreadsheet programs that were originated by accountants more than one hundred years ago in the form of Analysis Ledgers). PROSPER (Profit Simulation, Planning and Evaluation of Risk) package extended the previous work contained in PROP (Profit Rating of Projects).
NIMMS– Production control system (Acronym: Nineteen-hundred Integrated Modular Management System)
PROMPT– Production control system (Acronym: Production Reviewing Organising and Monitoring of Performance Techniques)
COMPAY– Company payroll program
DATAVIEW– Online data entry and enquiry system, capable of driving a large number of terminals
FIND– File Interrogation of Nineteenhundred Data (data analysis package)
Filetab– A tool for generating reports based on decision tables. Filetab was marketed by the National Computing Centre (NCC), set up by the British Government in Manchester. Initially, it was a very flexible, parameter-driven report generator with later versions allowing extensive file handling capabilities. The product was first known as NITA (Nineteen Hundred Tabulator) and later became known as TABN (Tabulator Nineteen Hundred). It would run on the ICL 1900 Series of machines, and later on both the 2900 Series and 3900 Series computers. TABN statements were either interpreted from punched cards at run-time, or they could be compiled to produce a program that could simply be executed. One of the attractions of writing programs in Filetab was its short development time.
- 20800 six bit characters per second.
- In "Another ICL Anthology" George Felton explains the origin of the name as follows:
"About January 1965, there was a meeting in my office, while I was away abroad, discussing different ways of allotting functions between the proposed operating system and Executive. Scheme A was discussed and rejected. Scheme B ditto. And Schemes C, D, E and F were also discarded in quick succession. When Scheme G came up, everybody was happy, and it was decided to adopt it. The "GEneral ORGanisational Environment' was also quickly formulated as the official expansion of the acronym. But the name 'GEORGE' was in any case a natural choice: it had echoes of aircraft autopilots; it was a bit of fun; and I certainly wasn't going to object".
- McGregor-Ross, Hugh (2012). Pegasus: the Seminal Early Computer. Bright Pen. ISBN 978-0-7552-1482-2.
- Campbell-Kelly, Martin (1989). ICL: A Business and Technical History. Oxford University Press. ISBN 0-19-853918-5.
- Carmichael, Hamish (November 1998). Another ICL Anthology (PDF). Laidlaw Hicks. ISBN 978-0-9527389-2-3. Retrieved 18 October 2013.
- "ICT 1900 Series Central Processors 1902, 1903" (PDF). ICT Press release. ICT. 1 September 1964. p. 3. Retrieved 11 February 2011.
- "ICT 1900 Series Central Processors 1904, 1905" (PDF). ICT Press release. ICT. 1 September 1964. p. 4. Retrieved 11 February 2011.
- "ICT 1900 Series Central Processors 1906, 1907" (PDF). ICT Press release. ICT. 1 September 1964. p. 4. Retrieved 11 February 2011.
- "ICT 1900 Series Central Processor 1909" (PDF). ICT Press release. ICT. 1 September 1964. p. 4. Retrieved 11 February 2011.
- Cambell-Kelly, pp 238
- Proctor, Brian; Keith Crook; Virgilio Pasquali. "Hardware technology in the ICT/ICL 1900 Range". Virgilio Pasquali. Retrieved 11 February 2011.
- Pasquali, Virgilio. "How the ICT 1900 Series evolved". Retrieved 11 February 2011.
- "ATLAS Replacement". Atlas Computer Laboratory. Retrieved 11 February 2011.
- “Equatorial orbit nailed”: the story behind the computer animations of ‘Alien’.
- Campbell-Kelly, page 304
- Hoevel, Lee W.; Wallach, Walter A. Jr. (November 1975). "A TALE OF THREE EMULATORS" (PDF). Stanford Electronics Laboratory Technical Report (Technical report No. 98). Retrieved 11 February 2011.
- Cambell-Kelly, p 326
- "Counterfeit computers better than originals". New Scientist. 22 June 1972. p. 690. Retrieved 13 February 2011.
- Goodman, H. P. (1 January 2004). "George Operating Systems for the ICL 1900 Series Computer Range". Archived from the original on 28 June 2011. Retrieved 15 February 2011.
- Guide to running George 3 on a raspberry pi at rs-online.com