Semiconductor intellectual property core
||It has been suggested that this article be merged with Semiconductor intellectual property. (Discuss) Proposed since August 2013.|
In electronic design a semiconductor intellectual property core, IP core, or IP block is a reusable unit of logic, cell, or chip layout design that is the intellectual property of one party. IP cores may be licensed to another party or can be owned and used by a single party alone. The term is derived from the licensing of the patent and/or source code copyright that exist in the design. IP cores can be used as building blocks within ASIC chip designs or FPGA logic designs.
IP cores in the electronic design industry have had a profound impact on the design of systems on a chip. By licensing a design multiple times, an IP core licensor spreads the cost of development among multiple chip makers. IP cores for standard processors, interfaces, and internal functions have enabled chip makers to put more of their resources into developing the differentiating features of their chips. As a result, chip makers have developed innovations more quickly.
The licensing and use of IP cores in chip design came into common practice in the 1990s. There were many licensors and also many foundries competing on the market. Today, the most widely licensed IP cores are from ARM Holdings (43.2% market share in 2013), Synopsys Inc. (13.9% market share in 2013), Imagination Technology (9% market share in 2013) and Cadence Design Systems (5.1% market share in 2013).
Types of IP cores
IP cores are typically offered as synthesizable RTL. Synthesizable cores are delivered in a hardware description language such as Verilog or VHDL. These are analogous to high level languages such as C in the field of computer programming. IP cores delivered to chip makers as RTL permit chip designers to modify designs (at the functional level), though many IP vendors offer no warranty or support for modified designs.
IP cores are also sometimes offered as generic gate-level netlists. The netlist is a boolean-algebra representation of the IP's logical function implemented as generic gates or process specific standard cells. An IP core implemented as generic gates is portable to any process technology. A gate-level netlist is analogous to an assembly-code listing in the field of computer programming. A netlist gives the IP core vendor reasonable protection against reverse engineering.
Both netlist and synthesizable cores are called "soft cores", as both allow a synthesis, placement and route (SPR) design flow.
Hard cores, by the nature of their low-level representation, offer better predictability of chip performance in terms of timing performance and area.
Analog and mixed-signal logic are generally defined as a lower-level, physical description. Hence, analog IP (SerDes, PLLs, DAC, ADC, PHYs, etc.) are provided to chip makers in transistor-layout format (such as GDSII). Digital IP cores are sometimes offered in layout format, as well.
Such cores, whether analog or digital, are called "hard cores" (or hard macros), because the core's application function cannot be meaningfully modified by chip designers. Transistor layouts must obey the target foundry's process design rules, and hence, hard cores delivered for one foundry's process cannot be easily ported to a different process or foundry. Merchant foundry operators (such as IBM, Fujitsu, Samsung, TI, etc.) offer a variety of hard-macro IP functions built for their own foundry process, helping to ensure customer lock-in.
Sources of IP cores
Many of the best known IP cores are soft microprocessor designs. Their instruction sets vary from small 8-bit processors, such as the 8051 and PIC to 32-bit and 64-bit processors such as the ARM architectures or MIPS architectures. Such processors form the "brains" of many embedded systems.
IP cores are also licensed for a variety of peripheral controllers such as for PCI Express, SDRAM, ethernet, LCD display, AC'97 audio, and USB. Many of those interfaces require digital logic as well as analog IP cores to drive and receive high speed, high voltage, or high impedance signals outside of the chip.
"Hardwired" (as opposed to software programmable soft microprocessors described above) digital logic IP cores are also licensed for fixed functions such as MP3 audio decode, 3D GPU, digital video decode, and other DSP functions such as FFT, DCT, or Viterbi coding.
IP core developers and licensors range in size from individuals to multi-billion dollar corporations. Developers, as well as their chip making customers are located throughout the world.
An incomplete list of IP core licensors has been compiled.
Free and open-source
OpenCores.org offers a wide variety of designs, mostly written in VHDL and Verilog. All of these cores are provided under some Free and open-source software-license, e.g. GNU General Public License or BSD-like licenses (see OpenCores licenses for details).
Intellectual property aggregators keep catalogs of cores from multiple vendors and provide search and marketing services to their customers.
- Clark, Peter (April 23, 2014). "Cadence breaks into top four in semi IP core ranking". EE Times Europe (N/A) (Peter Clark). European Business Press SA. Retrieved July 14, 2014.
- Open cores "design and publish core" (under LGPL Licence)
- Altera cores Free reference IP cores for FPGAs
- Open Source Semiconductor Core Licensing, 25 Harvard Journal of Law & Technology 131 (2011) Article analyzing the law, technology and business of open source semiconductor cores