Instructions per cycle
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In computer architecture, instructions per cycle (IPC) is one aspect of a processor's performance: the average number of instructions executed for each clock cycle. It is the multiplicative inverse of cycles per instruction.
Calculation of IPC
The number of instructions per second and floating point operations per second for a processor can be derived by multiplying the number of instructions per cycle with the clock rate (cycles per second given in Hertz) of the processor in question. The number of instructions per second is an approximate indicator of the likely performance of the processor.
The number of instructions executed per clock is not a constant for a given processor; it depends on how the particular software being run interacts with the processor, and indeed the entire machine, particularly the memory hierarchy. However, certain processor features tend to lead to designs that have higher-than-average IPC values; the presence of multiple arithmetic logic units (an ALU is a processor subsystem that can perform elementary arithmetic and logical operations), and short pipelines. When comparing different instruction sets, a simpler instruction set may lead to a higher IPC figure than an implementation of a more complex instruction set using the same chip technology; however, the more complex instruction set may be able to achieve more useful work with fewer instructions.
Factors governing IPC
A given level of instructions per second can be achieved with a high IPC and a low clock speed (like the AMD Athlon and early Intel's Core Series), or from a low IPC and high clock speed (like the Intel Pentium 4 and to a lesser extent the AMD Bulldozer). Both are valid processor designs, and the choice between the two is often dictated by history, engineering constraints, or marketing pressures. However high IPC with high frequency gives the best performance.
FLOPs per cycle for various microarchitectures
|CPU Family||Dual precision||Single precision|
|Intel Core and Intel Nehalem||4 IPC||8 SP IPC|
|Intel Sandy Bridge and Intel Ivy Bridge||8 DP IPC||16 SP IPC|
|Intel Haswell, Intel Broadwell and Intel Skylake||16 DP IPC||32 SP IPC|
|AMD K10||4 DP IPC||8 SP IPC|
|AMD Bulldozer, AMD Piledriver and AMD Steamroller, per module (two cores)||8 DP IPC||16 SP IPC|
|AMD Ryzen||8 DP IPC||16 SP IPC|
|Intel Atom (Bonnell, Saltwell, Silvermont and Goldmont)||2 DP IPC||4 SP IPC|
|AMD Bobcat||2 DP IPC||4 SP IPC|
|AMD Jaguar||4 DP IPC||8 SP IPC|
|ARM Cortex-A7||1 IPC||8 SP IPC|
|ARM Cortex-A9||1 IPC||8 SP IPC|
|ARM Cortex-A15||1 DP IPC||8 SP IPC|
|ARM Cortex-A32||2 DP IPC||8 SP IPC|
|ARM Cortex-A35||2 DP IPC||8 SP IPC|
|ARM Cortex-A53||2 DP IPC||8 SP IPC|
|ARM Cortex-A57||2 DP IPC||8 SP IPC|
|ARM Cortex-A72||2 DP IPC||8 SP IPC|
|Qualcomm Krait||1 DP IPC||8 SP IPC|
|Qualcomm Kryo||2 DP IPC||8 SP IPC|
|IBM PowerPC A2 (Blue Gene/Q), per core||8 DP IPC (SP elements are extended to DP and processed on the same units)|
|IBM PowerPC A2 (Blue Gene/Q), per thread||4 DP IPC (SP elements are extended to DP and processed on the same units)|
|Intel Xeon Phi (Knights Corner), per core||16 DP IPC||32 SP IPC|
|Intel Xeon Phi (Knights Corner), per thread (two per core)||8 DP IPC||16 SP IPC|
If you want to check IPC at higher numbers than 64-bit or for other microarchitecture, you must check the microarchitecture's registers. Wide of registers shows, how big number core of processor can count one time. Remember, that two or more registers can connect together with some instructions, so number of registers is important too.
The useful work that can be done with any computer depends on many factors besides the processor speed. These factors include the instruction set architecture, the processor's microarchitecture, and the computer system organization (such as the design of the disk storage system and the capabilities and performance of other attached devices), the efficiency of the operating system, and most importantly the high-level design of the application software in use.
For users and purchasers of a computer system, instructions per clock is not a particularly useful indication of the performance of their system. For an accurate measure of performance relevant to them, application benchmarks are much more useful. Awareness of its existence is useful, in that it provides an easy-to-grasp example of why clock speed is not the only factor relevant to computer performance.
- Instructions per second
- Cycles per instruction
- Megahertz myth
- The benchmark article provides a useful introduction to computer performance measurement for those readers interested in the topic.
- John L. Hennessy, David A. Patterson. "Computer architecture: a quantitative approach". 2007.
- FLOPS per cycle for sandy-bridge and haswell SSE2/AVX/AVX2