A ceramic C1103 variant.
|Media type||8 μm p-MOS DRAM|
|Usage||HP 9800 series, PDP-11 and others|
The 1103 is a dynamic random-access memory (DRAM) integrated circuit (IC) developed and fabricated by Intel. Introduced in October 1970, the 1103 was the first commercially available DRAM IC; and due to its small physical size and low price relative to magnetic-core memory, it replaced the latter in many applications. When it was introduced in 1970, initial production yields were poor, and it was not until the fifth stepping of the production masks that it became available in large quantities during 1971.
In 1969 William Regitz and his colleagues at Honeywell invented a three-transistor dynamic memory cell and began to canvass the semiconductor industry for a producer. The recently founded Intel Corporation responded and developed two very similar 1024-bit chips, the 1102 and 1103, under the lead of Joel Karp, working closely with William Regitz. Ultimately only the 1103 went into production.
|tRWC||580 ns||Random read or write cycle time (from one +ve Precharge edge to the next)|
|tPO||300 ns||Access time: Precharge High to valid data out|
|tREF||2 ms||Refresh time|
|VCC||16 V||Supply voltage|
|p-MOS||8 μm||Production process (silicon gate MOSFET)|
|Capacity||1024x1||Capacity x bus width|
- Mary Bellis (August 25, 2016). "Who Invented the Intel 1103 DRAM Chip". ThoughtCo.
- PDP-11/45, 11/50, and 11/55 System Maintenance Manual (PDF). Digital Equipment Corporation. September 1976.
- "Defining Intel: 25 Years/25 Events" (PDF). Intel Corporation. Page 6.
- Intel Corporation, "The 1103 retires!", Intel Preview, March/April 1979, page 23
- Jacob, Bruce et al. (2008). Memory Systems: Cache, DRAM, Disk. Morgan Kaufmann Publishers. pp. 457–458.
- Computer History Museum: "Oral History of Joel Karp" Interviewed by Gardner Hendrie March 3, 2003 | Atherton, California
- Tedlow, Richard S. (2006). Andy Grove: The Life and Times of an American. Portfolio. pp. 141–142. ISBN 9781591841395.
- Lojek, Bo (2007). History of Semiconductor Engineering. Springer Science & Business Media. pp. 362–363. ISBN 9783540342588.
The i1103 was manufactured on a 6-mask silicon-gate P-MOS process with 8 μm minimum features. The resulting product had a 2,400 μm, 2 memory cell size, a die size just under 10 mm2, and sold for around $21.
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