This is a list of device bit rates, or physical layer information rates, net bit rates, useful bit rates, peak bit rates or digital bandwidth capacity, at which digital interfaces of computer peripheral equipment and network devices can communicate over various kinds of buses and networks. The distinction can be arbitrary between a bus, (which is inside a box and usually relies on many parallel wires), and a communications network cable, (which is external, between boxes and rarely relies on more than four wires). Many device interfaces or protocols (e.g., SATA, USB, SCSI, PCI and a few variants of Ethernet) are used both inside many-device boxes, such as a PC, and one-device-boxes, such as a hard drive enclosure. Accordingly, this page lists both the internal ribbon and external communications cable standards together in one sortable table.
Factors limiting actual performance, criteria for real decisions
Most of the listed rates are theoretical maximum throughput measures; in practice, the actual effective throughput is almost inevitably lower in proportion to the load from other devices (network/bus contention), interframe gap, and other overhead in data link layer protocols etc. The maximum goodput (for example, the file transfer rate) may be even lower due to higher layer protocol overhead and data packet retransmissions caused by line noise or interference such as crosstalk, or lost packets in congested intermediate network nodes. All protocols lose something, and the more robust ones that deal resiliently with very many failure situations tend to lose more maximum throughput to get higher total long term rates.
Device interfaces where one bus transfers data via another will be limited to the throughput of the slowest interface, at best. For instance, SATA 6G controllers on one PCIe 5G channel will be limited to the 5G rate and have to employ more channels to get around this problem. Early implementations of new protocols very often have this kind of problem. The physical phenomena on which the device relies (such as spinning platters in a hard drive) will also impose limits; for instance, no spinning platter shipping in 2009 saturates SATA II (3 Gbit/s), so moving from this 3 Gbit/s interface to USB3 at 4.8 Gbit/s for one spinning drive will result in no increase in realized transfer rate.
Contention in a wireless or noisy spectrum, where the physical medium is entirely out of the control of those who specify the protocol, requires measures that also use up throughput. Wireless devices, BPL, and modems may produce a higher line rate or gross bit rate, due to error-correcting codes and other physical layer overhead. It is extremely common for throughput to be far less than half of theoretical maximum, though the more recent technologies (notably BPL) employ preemptive spectrum analysis to avoid this and so have much more potential to reach actual gigabit rates in practice than prior modems.
Another factor reducing throughput is deliberate policy decisions made by Internet service providers that are made for contractual, risk management, aggregation saturation, or marketing reasons. Examples are rate limiting, bandwidth throttling, and the assignment of IP addresses to groups. These practices tend to minimize the throughput available to every user, but maximize the number of users that can be supported on one backbone.
Furthermore, chips are often not available in order to implement the fastest rates. AMD, for instance, does not support the 32-bit HyperTransport interface on any CPU it has shipped as of the end of 2009. Additionally, WiMax service providers in the US typically support only up to 4 Mbit/s as of the end of 2009.
Choosing service providers or interfaces based on theoretical maxima is unwise, especially for commercial needs. A good example is large scale data centers, which should be more concerned with price per port to support the interface, wattage and heat considerations, and total cost of the solution. Because some protocols such as SCSI and Ethernet now operate many orders of magnitude faster than when originally deployed, scalability of the interface is one major factor, as it prevents costly shifts to technologies that are not backward compatible. Underscoring this is the fact that these shifts often happen involuntarily or by surprise, especially when a vendor abandons support for a proprietary system.
By convention, bus and network data rates are denoted either in bits per second (bit/s) or bytes per second (B/s). In general, parallel interfaces are quoted in B/s and serial in bit/s. The more commonly used is shown below in bold type.
On devices like modems, bytes may be more than 8 bits long because they may be individually padded out with additional start and stop bits; the figures below will reflect this. Where channels use line codes (such as Ethernet, Serial ATA and PCI Express), quoted rates are for the decoded signal.
The figures below are simplex data rates, which may conflict with the duplex rates vendors sometimes use in promotional materials. Where two values are listed, the first value is the downstream rate and the second value is the upstream rate.
All quoted figures are in metric decimal units. Note that these aren't the traditional binary prefixes for memory size. These decimal prefixes have long been established in data communications. This occurred before 1998 when IEC and other organizations introduced new binary prefixes and attempted to standardize their use across all computing applications.
802.11 networks in infrastructure mode are half-duplex; all stations share the medium. In infrastructure or access point mode, all traffic has to pass through an Access Point (AP). Thus, two stations on the same access point that are communicating with each other must have each and every frame transmitted twice: from the sender to the access point, then from the access point to the receiver. This approximately halves the effective bandwidth.
802.11 networks in ad hoc mode are still half-duplex, but devices communicate directly rather than through an access point. In this mode all devices must be able to "see" each other, instead of only having to be able to "see" the access point.
x LPC protocol includes high overhead. While the gross data rate equals 33.3 million 4-bit-transfers per second (or 7008133360000000000♠16.67 MB/s), the fastest transfer, firmware read, results in 7008125040000000000♠15.63 MB/s. The next fastest bus cycle, 32-bit ISA-style DMA write, yields only 7007533600000000000♠6.67 MB/s. Other transfers may be as low as 7007160000000000000♠2 MB/s.
y Uses 128b/130b encoding, meaning that about 1.54% of each transfer is used by the interface instead of carrying data between the hardware components at each end of the interface. For example, a single link PCIe 3.0 interface has an 8 Gbit/s transfer rate, yet its usable bandwidth is only about 7.88 Gbit/s.
z Uses 8b/10b encoding, meaning that 20% of each transfer is used by the interface instead of carrying data from between the hardware components at each end of the interface. For example, a single link PCIe 1.0 has a 2.5 Gbit/s transfer rate, yet its usable bandwidth is only 2 Gbit/s (250 MB/s).
The table below shows values for PC memory module types. These modules usually combine multiple chips on one circuit board. SIMM modules connect to the computer via an 8 bit or 32 bit wide interface. DIMM modules connect to the computer via a 64 bit wide interface. Some other computer architectures use different modules with a different bus width.
FPM, EDO, SDR, and RDRAM memories were not commonly installed in a dual-channel configuration. DDR and DDR2 memory are usually installed in single or dual-channel configuration. DDR3 memory are installed in single, dual, tri, and quad-channel configurations. Bit rates of multi-channel configuration are slightly increased.
RAM memory modules are also utilised by graphics processing units; however, memory modules for those differs somewhat, particularly with lower power requirements, and is specialised to serve GPUs: for example, the introduction of GDDR3, which was fundamentally based on DDR2. Every graphics memory chip is directly connected to the GPU (point-to-point). The total GPU memory bus width varies with the number of memory chips and the number of lanes per chip. For example, GDDR5 specifies either 16 or 32 lanes per "device" (chip). Over the years, bus widths ranged from 64-bit to 512-bit. Because of this variability, graphics memory speeds are sometimes compared per pin. For direct comparison to the values for 64-bit modules shown above, video RAM is compared here in 64-lane lots, corresponding to two chips. In 2012, high-end GPUs use 8 or even 12 chips with 32 lanes each, for a total memory bus width of 256 or 384 bits. Combined with a transfer rate per pin of 5 GT/s or more, such cards can reach 240 GB/s or more.
RAM frequencies vary greatly. The values given below are examples for high-end cards. Since many cards have more than one pair of chips, the total bandwidth is correspondingly higher. For example, high-end cards often have eight chips, so that the total bandwidth is four times the value given below.
^TTY uses a Baudot code, not ASCII. This uses 5 bits per character instead of 8, plus one start and approx. 1.5 stop bits (7.5 total bits per character sent).
^Morse can transport 26 alphabetic, 10 numeric and one interword gap plaintext symbols. Transmitting 37 different symbols requires 5.21 bits of information (25.21=37). A skilled operator encoding the benchmark "PARIS" plus an interword gap (equal to 31.26 bits) at 40 wpm is operating at an equivalence of 20.84 bit/s.
^WPM, or Words Per Minute, is the number of times the word "PARIS" is transferred per minute. Strictly speaking the code is quinary, accounting inter-element, inter-letter, and inter-word gaps, yielding 50 binary elements (bits) per one word. Counting characters, including inter-word gaps, gives six characters per word or 240 characters per minute, and finally four characters per second.
^ abcdefghijAll modems are wrongly assumed to be in serial operation with 1 start bit, 8 data bits, no parity, and 1 stop bit (2 stop bits for 110-baud modems). Therefore, currently modems are wrongly calculated with transmission of 10 bits per 8-bit byte (11 bits for 110-baud modems). Although the serial port is nearly always used to connect a modem and has equivalent data rates, the protocols, modulations and error correction differ completely.
^ abc56K modems: V.90 and V.92 have just 5% overhead for the protocol signaling. The maximum capacity can only be achieved when the upstream (service provider) end of the connection is digital, i.e. a DS0 channel.
^Note that effective aggregate bandwidth for an ISDN installation is typically higher than the rates shown for a single channel due to the use of multiple channels. A basic rate interface (BRI) provides two "B" channels and one "D" channel. Each B channel provides 64 kBit/s bandwidth and the "D" channel carries signaling (call setup) information. B channels can be bonded to provide a 128 kbit/s data rate. Primary rate interfaces (PRI) vary depending on whether the region uses E1 (Europe, world) or T1 (North America) bearers. In E1 regions, the PRI carries 30 B-channels and one D-channel; in T1 regions the PRI carries 23 B-channels and one D-channel. The D-channel has different bandwidth on the two interfaces.
^ abDOCSIS 1.0 includes technology which first became available around 1995–1996, and has since become very widely deployed. DOCSIS 1.1 introduces some security improvements and Quality of Service (QoS). Cite error: Invalid <ref> tag; name "DOCSIS_10" defined multiple times with different content (see the help page).
^ abDOCSIS 2.0 specifications provide increased upstream throughput for symmetric services. Cite error: Invalid <ref> tag; name "DOCSIS_20" defined multiple times with different content (see the help page).
^ADSL connections will vary in throughput from 64 kbit/s to several Mbit/s depending on configuration. Most are commonly below 2 Mbit/s. Some ADSL and SDSL connections have a higher digital bandwidth than T1 but their rate is not guaranteed, and will drop when the system gets overloaded, whereas the T1 type connections are usually guaranteed and have no contention ratios.
^Satellite internet may have a high bandwidth but also has a high latency due to the distance between the modem, satellite and hub. One-way satellite connections exist where all the downstream traffic is handled by satellite and the upstream traffic by land-based connections such as 56K modems and ISDN.
^Dave Haynie, designer of the Zorro III bus, states in this posting that Zorro III is an asynchronous bus and therefore does not have a classical MHz rating. A maximum theoretical MHz value may be derived by examining timing constraints detailed in the Zorro III technical specification, which should yield about 37.5 MHz. No existing implementation performs to this level.
^Dave Haynie, designer of the Zorro III bus, claims in this posting that Zorro III has a max burst rate of 150 MB/s.
^SCSI-1, SCSI-2 and SCSI-3 are signaling protocols and do not explicitly refer to a specific rate. Narrow SCSI exists using SCSI-1 and SCSI-2. Higher rates use SCSI-2 or later.
^ abcdeFibre Channel 1GFC, 2GFC, 4GFC use an 8b/10b encoding scheme. Fibre Channel 10GFC, which uses a 64B/66B encoding scheme, is not compatible with 1GFC, 2GFC and 4GFC, and is used only to interconnect switches.