Integrated circuits are put into protective packages to allow easy handling and assembly onto printed circuit boards and to protect the devices from damage. A very large number of different types of package exist. Some package types have standardized dimensions and tolerances, and are registered with trade industry associations such as JEDEC and Pro Electron . Other types are proprietary designations that may be made by only one or two manufacturers. Integrated circuit packaging is the last assembly process before testing and shipping devices to customers.
Occasionally specially-processed integrated circuit dies are prepared for direct connections to a substrate without an intermediate header or carrier. In flip chip systems the IC is connected by solder bumps to a substrate. In beam-lead technology, the metallized pads that would be used for wire bonding connections in a conventional chip are thickened and extended to allow external connections to the circuit. Assemblies using "bare" chips have additional packaging or filling with epoxy to protect the devices from moisture.
Through-hole package [ edit ]
Through hole technology uses holes drilled through the PCB for mounting the components. The component has leads that are soldered to pads on the PCB to electrically and mechanically connect them to the PCB.
Three 14-pin (DIP14) plastic dual in-line packages containing IC chips.
Acronym
Full name
Remark
SIP
Single in-line package
DIP
Dual in-line package
0.1 in (2.5 mm) pin spacing, rows 0.3 in (7.6 mm) or 0.6 in (15 mm) apart.
CDIP
Ceramic DIP [ 1] ]
CERDIP
Glass sealed ceramic DIP [ 1]
QIP
Quadruple in-line package
Like DIP but with staggered (zig-zag) pins.[ 1]
SDIP
Skinny DIP
Standard DIP with 0.1 in pin spacing, rows 0.3 in apart.[ 1]
ZIP
Zig-zag in-line package
MDIP
Molded DIP .[ 2]
PDIP
Plastic DIP .[ 1]
Surface mount [ edit ]
Acronym
Full name
Remark
CCGA
Ceramic Column Grid Array (CGA)[ 3]
CGA
Column Grid Array[ 3]
Example
CERPACK
Ceramic package [ 4]
CQGP[ 5]
LLP
Lead-Less lead-frame Package
A package with metric pin distribution (0.5–0.8 mm pitch)[ 6]
LGA
Land Grid Array[ 3]
LTCC
Low temperature co-fired ceramic[ 7]
MCM
Multi-Chip Module[ 8]
MICRO SMDXT
Micro Surface Mount Device extended technology[ 9]
Example
Chip carrier [ edit ]
A chip carrier is a rectangular package with contacts on all four edges. Leaded chip carriers have metal leads wrapped around the edge of the package, in the shape of a letter J. Leadless chip carriers have metal pads on the edges. Chip carrier packages may be made of ceramic or plastic and are usually secured to a printed circuit board by soldering, though sockets can be used for testing.
Acronym
Full name
Remark
BCC
Bump Chip Carrier [ 3]
-
CLCC
Ceramic Leadless Chip Carrier [ 1]
-
LCC
Leadless Chip Carrier [ 3]
Contacts are recessed vertically.
LCC
Leaded Chip Carrier [ 3]
-
LCCC
Leaded Ceramic Chip Carrier [ 3]
-
DLCC
Dual Lead-Less Chip Carrier (Ceramic) [ 3]
-
PLCC
Plastic Leaded Chip Carrier [ 1] [ 3]
-
Pin grid arrays [ edit ]
Main article:
Pin grid array
Acronym
Full name
Remark
OPGA
Organic Pin Grid Array
-
FCPGA
Flip-chip Pin Grid Array [ 3]
-
PAC
Pin Array Cartridge [ 10]
-
PGA
Pin grid array
also known as PPGA [ 1]
CPGA
Ceramic Pin Grid Array [ 3]
-
Flat packages [ edit ]
Acronym
Full name
Remark
-
Flatpack
Earliest version metal/ceramic packaging with flat leads
CFP
Ceramic Flat Pack [ 3]
-
CQFP
ceramic quad flat-pack, similar to PQFP [ 1] [ 3]
-
BQFP
Bumpered Quad Flat Pack [ 3]
-
DFN
Dual Flat Pack
No Lead [ 3]
ETQFP
Exposed Thin Quad Flat Package [ 11]
-
PQFN
power quad flat-pack
No-leads, with exposed die-pad[s] for heatsinking [ 12]
PQFP
Plastic quad flat package [ 1] [ 3]
-
LQFP
Low-profile Quad Flat Package [ 3]
-
QFN
Quad Flat No Leads
Also called as micro lead frame (MLF ).[ 3] [ 13]
QFP
Quad Flat Package [ 1] [ 3]
-
MQFP
Metric Quad Flat Pack
QFP with metric pin distribution [ 3]
HVQFN
Heat-sink very-thin quad flat-pack no-leads
-
SIDEBRAZE [ 14] [ 15]
-
-
TQFP
Thin Quad Flat Pack [ 1] [ 3]
-
TQFN
Thin Quad Flat No-Lead
-
VQFP
Very-thin Quad Flat Pack [ 3]
-
ODFN
Optical Dual Flat No-Lead
IC packaged in transparent packaging used in optical sensor
Small outline packages [ edit ]
Acronym
Full name
Remark
SOP
Small Outline Package [ 1]
-
CSOP
Ceramic Small Outline Package
-
MSOP
Mini Small-Outline Package
-
PSOP
Plastic small-outline package [ 3]
-
PSON
Plastic small-outline no lead package
-
QSOP
Quarter-Size Small-Outline Package
The pin spacing are width of 0.635 mm.[ 3]
SOIC
Small Outline Integrated Circuit
Also known as SOIC NARROW and SOIC WIDE
SSOP
Shrink Small-Outline Package [ 3]
-
TSOP
Thin Small-outline Package [ 3]
Example
TSSOP
Thin Shrink Small Outline Package [ 3]
-
TVSOP
Thin Very Small-Outline Package [ 3]
-
µMAX
-
Similar to a SOIC . (A Maxim trademark example )
WSON
-
Very Very Thin Small Outline No Lead Package
Chip-scale packages [ edit ]
Example WL-CSP devices sitting on the face of a
U.S. penny . A
SOT-23 device is shown for comparison.
Acronym
Full name
Remark
CSP
Chip Scale Package
Package size is no more than 1.2× the size of the silicon chip [ 16] [ 17]
TCSP
True Chip Size Package
Package is same size as silicon [ 18]
TDSP
True Die Size Package
Same as TCSP [ 18]
MICRO SMD
-
Chip-size package (CSP) developed by National Semiconductor [ 19]
COB
Chip-on-board
Bare silicon chip, that is usually an integrated circuit, is supplied without a package.
COF
Chip-on-flex
Variation of COB, where a chip is mounted directly to a flex circuit.
COG
Chip-on-glass
Variation of COB, where a chip is mounted directly to a piece of glass - typically an LCD.
Ball grid array [ edit ]
Ball Grid Array uses the underside of the package to place pads with balls of solder in grid pattern as connections to PCB. [ 1] [ 3]
Acronym
Full name
Remark
FBGA
fine pitch ball grid array
a square or rectangular array of solder balls on one surface [ 3]
LBGA
Low Profile Ball Grid Array
also known as Laminate Ball Grid Array [ 3]
TEPBGA
Thermally Enhanced Plastic BGA
-
CBGA
Ceramic Ball Grid Array [ 3]
-
OBGA
Organic Ball Grid Array [ 3]
-
TFBGA
Thin fine pitch BGA .[ 3]
-
PBGA
Plastic Ball Grid Array [ 3]
-
MAP-BGA
Mold Array Process-Ball Grid Array [2]
-
UCSP
Micro (μ) Chip Scale Package
Similar to a BGA (A Maxim trademark example ) [ 17]
μBGA
Micro-BGA (Ball grid array )
With ball spacing less than 1 mm
LFBGA
Low profile fine pitch ball grid array [ 3]
-
TBGA
Thin Ball Grid Array [ 3]
-
SBGA
Super BGA - above 500 Pin count [ 3]
-
UFBGA
Ultra Fine BGA [ 3]
Example
Transistor, diode, small pin count IC packages [ edit ]
MELF : Metal Electrode Leadless Face (usually for resistors and diodes)
SOD: Small Outline Diode.
SOT: Small Outline Transistor (also SOT-23, SOT-223, SOT-323).
TO-XX: wide range of small pin count packages often used for discrete parts like transistors or diodes.
TO-3
TO-5
TO-18 : metal can package with radial leads
TO-39
TO-46
TO-92 : plastic encapsulated package with three leads
TO-99
TO-100
TO-126 : plastic encapsulated package with three leads and a hole for mounting on a heat sink
TO-220 : through-hole plastic package with a (usually) metal heat sink tab and three leads
TO-226 [ 20]
TO-247 [ 21]
TO-252 (also called SOT428, DPAK)[ 22]
TO-263 , also called D2PAK : SMT package similar to the TO-220
TO-263 THIN
Multi-chip packages [ edit ]
Occasionally people put several chips of silicon in a single package. A variety of techniques for interconnecting several chips within a single package have been proposed and researched:
See also [ edit ]
References [ edit ]
^ a b c d e f g h i j k l m n "CPU Collection Museum - Chip Package Information" . The CPU Shack. Retrieved 2011-12-15 .
^ http://www.national.com/ms/PA/PACKING_CONSIDERATIONS__METHODS__MATERIALS_AND_REC.pdf
^ a b c d e f g h i j k l m n o p q r s t u v w x y z aa ab ac ad ae af ag ah ai aj ak al am "Integrated Circuit, IC Package Types; SOIC. Surface Mount Device Package" . Interfacebus.com. Retrieved 2011-12-15 .
^ "National Semiconductor CERPACK Package Products" . National.com. Retrieved 2011-12-15 .
^ "National Semiconductor CQGP Package Products" . National.com. Retrieved 2011-12-15 .
^ "National's LLP Package" . National.com. Retrieved 2011-12-15 .
^ "LTCC Low Temperature Co-fired Ceramic" . Minicaps.com. Retrieved 2011-12-15 .
^ "IEEE Xplore - Performance evaluation of MCM chip-to-chip interconnections using custom I/O buffer designs" . Ieeexplore.ieee.org. doi :10.1109/ASIC.1993.410760 . Retrieved 2011-12-15 .
^ "National Semiconductor Launches New Generation of Ultra-Miniature, High Pin-Count Integrated Circuit Packages" . National.com. Retrieved 2011-12-15 .
^ Meyers, Michael; Jernigan, Scott (2004). Mike Meyers' A+ Guide to PC Hardware . The McGraw-Hill Companies . ISBN 978-0-07-223119-9 .
^ [1] [dead link ]
^ "Press Releases - Motorola Mobility, Inc" . Motorola.com. Retrieved 2011-12-15 .
^ "Xilinx new CPLDs with two I/O banks" . Eetasia.com. 2004-12-08. Retrieved 2011-12-15 .
^ "Packages" . Chelseatech.com. 2010-11-15. Retrieved 2011-12-15 .
^ http://cpu.linuxmania.net/liste/cpuinfo/chip-package/SIDEBRAZE_DIP/chip-package-sidebraze.htm
^ "CSP - Chip Scale Package" . Siliconfareast.com. Retrieved 2011-12-15 .
^ a b "Understanding Flip-Chip and Chip-Scale Package Technologies and Their Applications - Maxim" . Maxim-ic.com. 2007-04-18. Retrieved 2011-12-15 .
^ a b "Chip Scale Review Online" . Chipscalereview.com. Retrieved 2011-12-15 .
^ "Packaging Technology | National Semiconductor – Package Drawings, Part Marking, Package Codes, LLP, micro SMD, Micro-Array" . National.com. Retrieved 2011-12-15 .
^ http://www.siliconfareast.com/to226.htm
^ http://www.vishay.com/docs/95223/to247.pdf
^ NXP. "SOT428" .
^ Proximity Communication - the Technology , 2004, archived from the original on 2009-07-18
External links [ edit ]
Diode
Transistor
Single row
Dual row
Quad row
Grid array
Wafer
Related topics
Note: It's relatively common to find packages that contain other components than their designated ones, such as
voltage regulators in transistor packages, etc.