Maskless lithography

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Maskless lithography utilizes methods that directly transfer the information onto the substrate, without utilizing an intermediate static mask, i.e. photomask that is directly replicated. In microlithography typically radiation transfer casts an image of a time constant mask onto a photosensitive emulsion (or photoresist).[1] Traditionally mask aligners, steppers, scanners, but also other non-optical techniques for high speed replication of microstructures are common. The concept takes advantage of high speed or parallel manipulation technologies that have been enabled by large and cheap available computing capacity, which is not an issue with the standard approach that decouples a slow, but precise structuring process for writing a mask from a fast and highly parallel copy process to achieve high replication throughputs as demanded for in industrial microstructuring.

Maskless lithography follows two main paths. One is a rasterized approach by generation of a time-variant intermittent image on an electronically modifiable (virtual) mask that is projected with known means (also known as Laser Direct Imaging and other synonyms), or by direct writing, where the radiation is focused to a narrow beam that is scanned in vector form across the resist. The beam is then used to directly write the image into the photoresist, one or more pixels at a time. Also combinations of the two approaches are known and it is not limited to optical radiation, but also extends into the UV, includes electron-beams and als mechanical or thermal ablation via MEMS devices.

A key advantage of maskless lithography is the ability to change lithography patterns from one run to the next, without incurring the cost of generating a new photomask. This may prove useful for double patterning or compensation of non-linear material beahaviour (e.g. when utilizing cheaper, non-cristalline substrate or to compensate for random placement errors of preceding structures).

The main disadvantages are complexity and costs for the replication process, the limitation of rasterization in respect to oversampling causes aliasing artefact, especially with smaller structures, while direct vector writing is limited in throughput. Also the digital throughput of such systems forma a bottleneck for high resolutions, i.e. structuring a 300mm diameter wafer with its area of ~707cm² requires about 10Byte of data in a rasterized format without oversampling and thus suffers from step-artefacts (aliasing). Oversampling by a factor of 10 to reduce these artefacts adds another two orders of magnitude 1Pi per single wafer that has to be transferred in ~1 min to the substrate to achieve high volume manufacturing speeds. Industrial maskless lithography is therefore currently only widely found for structuring lower resolution substrates, like in PCB-panel production, where resolutions ~50µm are most common (at ~2000 times lower throughput demand on the components).


Currently, the main forms of maskless lithography are electron beam and optical. In addition, focused ion beam systems have established an important niche role in failure analysis and defect repair. Also, systems based on arrays of mechanical and thermally ablative probe tips have demonstrated.

Electron beam[edit]

The most commonly used form of maskless lithography today is electron beam lithography. Its widespread use is due to the wide range of electron beam systems available accessing an equally wide range of electron beam energies (~10 eV to ~100 keV). This is already being used in wafer-level production at eASIC, which uses conventional direct-write electron beam lithography to customize a single via layer for low-cost production of ASICs.

Most maskless lithography systems currently being developed are based on the use of multiple electron beams.[2] The goal is to use the parallel scanning of the beams to speed up the patterning of large areas. However, a fundamental consideration here is to what degree electrons from neighboring beams can disturb one another (from Coulomb repulsion). Since the electrons in parallel beams are traveling equally fast, they will persistently repel one another, while the electron lenses act over only a portion of the electrons' trajectories.


Direct laser writing is a very popular form of optical maskless lithography, which offers flexibility, ease of use, and cost effectiveness in R&D processing. This equipment offers rapid patterning at sub-micrometre resolutions, and offers a compromise between performance and cost when working with feature sizes of approximately 200 nm or greater.

Interference lithography is or holographic exposures are no maskless processes and therefore do not "maskless", although they have no 1:1 imaging system in between.

For improved image resolution, ultraviolet light, which has a shorter wavelength than visible light, is used to achieve resolution down to around 100 nm. The main optical maskless lithography systems in use today are the ones developed for generating photomasks for the semiconductor and LCD industries.

In 2013, a group at Swinburne University of Technology published their achievement of 9 nm feature size and 52 nm pitch, using a combination of two optical beams of different wavelengths.[3]

Focused ion beam[edit]

Focused ion beam systems are commonly used today for sputtering away defects or uncovering buried features. The use of ion sputtering must take into account the redeposition of sputtered material.

Probe tip contact[edit]

IBM has developed an alternative maskless lithography technique based on atomic force microscopy see here.[4] In addition, Dip Pen Nanolithography is a promising new approach for patterning submicrometre features.


Technologies that enable maskless lithography is already used for the production of photomasks and in limited wafer-level production. There are some obstacles ahead of its use in high-volume manufacturing. First, there is a wide diversity of maskless techniques. Even within the electron-beam category, there are several vendors (Multibeam, Mapper Lithography, Canon, Advantest, Nuflare, JEOL) with entirely different architectures and beam energies. Second, throughput targets exceeding 10 wafers per hour still need to be met. Third, the capacity and ability to handle the large data volume (Tb-scale) needs to be developed and demonstrated.

In recent years DARPA and NIST have reduced support for maskless lithography in the U.S.[5]

There was a European program that would push the insertion of maskless lithography for IC manufacturing at the 32-nm half-pitch node in 2009.[6] Project name was MAGIC, or "MAskless lithoGraphy for IC manufacturing", in frame of EC 7th Framework Programme (FP7).[7]

Due to the increased mask costs for multiple patterning, maskless lithography is once again increasing in visibility.


  1. ^ R. Menon et al., Materials Today, Feb. 2005, pp. 26-33 (2005).
  2. ^ T. H. P. Chang et al., Microelectronic Engineering 57-58, pp. 117-135 (2001).
  3. ^ Nature Communications DOI: 10.1038/ncomms3061
  4. ^ P. Vettiger et al., IBM J. Res. Dev. 44, pp. 323-340 (2000).
  5. ^ - Darpa, NIST to end funding for U.S. maskless lithography
  6. ^ [1] EU forms new maskless litho group
  7. ^ [2]