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|Max. CPU clock rate||16 MHz to 50 MHz|
|Data width||32 bits|
|Address width||32 bits|
|L1 cache||256 bytes each for instruction and data, 16 lines of 4 entries of 4 bytes each, direct mapped|
|Architecture and classification|
|Instruction set||Motorola 68000 series|
|Products, models, variants|
The Motorola 68030 ("sixty-eight-oh-thirty") is a 32-bit microprocessor in the Motorola 68000 family. It was released in 1987. The 68030 was the successor to the Motorola 68020, and was followed by the Motorola 68040. In keeping with general Motorola naming, this CPU is often referred to as the 030 (pronounced oh-three-oh or oh-thirty).
The 68030 features 273,000 transistors with on-chip instruction and data caches of 256 bytes each. It also has an on-chip memory management unit (MMU) but does not have a built in floating-point unit (FPU). The 68881 and the faster 68882 floating point unit chips could be used with the 68030. A lower cost version of the 68030, the Motorola 68EC030, was also released, lacking the on-chip MMU. It was commonly available in both 132 pin QFP and 128 pin PGA packages. The poorer thermal characteristics of the QFP package limited the full 68030 QFP variant to 33 MHz; the PGA 68030s included 40 MHz and 50 MHz versions. There was also a small supply of QFP packaged EC variants.
As a microarchitecture, the 68030 is basically a 68020 core with an additional 256 byte data cache and a process shrink and an added burst mode for the caches, where four longwords can be placed in the cache without further CPU intervention. Motorola used the process shrink to pack more hardware on the die; in this case it was the MMU, which mostly (but not completely) compatible with the external 68851. The integration of the MMU made it more cost-effective than the 68020 with an external MMU; it also allowed the 68030 to access memory one cycle faster than a 68020/68851 combo. However, the 68030 can switch between synchronous and asynchronous buses without a reset. The 68030 also lacks some of the 68020's instructions, but it increases performance by ≈5% while reducing power draw by ≈25% compared to the 68020.
The 68030 can be used with the 68020 bus, in which case its performance is similar to 68020 that it was derived from. However, the 68030 provides an additional synchronous bus interface which, if used, accelerates memory accesses up to 33% compared to an equally clocked 68020. The finer manufacturing process allowed Motorola to scale the full-version processor to 50 MHz. The EC variety topped out at 40 MHz.
The 68030 was used in many models of the Apple Macintosh II and Commodore Amiga series of personal computers, NeXT Cube, later Alpha Microsystems multiuser systems, and some descendants of the Atari ST line such as the Atari TT and the Atari Falcon. It was also used in Unix workstations such as the Sun Microsystems Sun-3x line of desktop workstations (the earlier "sun3" used a 68020), laser printers and the Nortel Networks DMS-100 telephone central office switch. More recently, the 68030 core has also been adapted by Freescale into a microcontroller for embedded applications.
LeCroy has used the 68EC030 in certain models of their 9300 Series digital oscilloscopes including “C” suffix models:87-88 and high performance 9300 Series models, along with the Mega Waveform Processing hardware option for 68020-based 9300 Series models.
Hewlett-Packard's HP LaserJet 4 Laserjet 4 JetDirect network attach card uses a 68030 as its main processor. That card is a small UNIX system with something which to a system on the network behaves the same as the lpd daemon.
The 68EC030 is a low cost version of the 68030, the difference between the two being that the 68EC030 omits the on-chip memory management unit (MMU) and is thus essentially an upgraded 68020.
The 68EC030 was used as the CPU for the low-cost model of the Amiga 4000, and on a number of CPU accelerator cards for the Commodore Amiga line of computers. It was also used in the Cisco Systems 2500 Series router, a small-to-medium enterprise computer internetworking appliance.
The 50 MHz speed is exclusive to the ceramic PGA package, the plastic '030 stopped at 40 MHz.
|CPU clock rate||16, 20, 25, 33, 40, 50 MHz, except for MC68EC030 available in 25 and 40 MHz|||
|Internal Harvard architecture|||
|Address bus||32 bit|||
|Data bus||32 bit|||
|Cache||256 bytes each for instruction and data, 16 lines of 4 entries of 4 bytes each, direct mapped|||
|dynamic bus sizing|||
|burst memory interface|||
|Performance||18 MIPS @ 50 MHz|||
- "MC68030 Product Summary Page". Freescale. 2012. Archived from the original on October 6, 2014.
- "MC68030 User Manual" (PDF). Motorola. 1990. Archived from the original (PDF) on October 2, 2017.
- Gord, Roy (2 May 1990). "68851 PMMU and 68030 MMU". Retrieved 2017-05-24.
Neither the PMMU nor the 68030 MMU constitutes a proper superset of the other. The PMMU has instructions and registers not found in the 68030 MMU, while the latter has registers not on the PMMU. However, in a typical Unix implementation little work would needed to port PMMU specific code to the 68030.
- LeCroy 1996 Test & Measurement Product Catalog, 9300 Series Hardware Options, Mega Waveform Processing, Pages 66-67
- "Motorola 68030 (MC68030) microprocessor family". cpu-world.com. November 17, 2012.
- 68030 images and descriptions at cpu-collection.de
- Official information about the Freescale MC68030 microcontroller
- Motorola 68k family data sheets at bitsavers.org