Neurogrid

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With sixteen 12x14 sq-mm chips (Neurocores) assembled on a 6.5x7.5 sq-in circuit board (shown above), Neurogrid can model a slab of cortex with up to 16x256x256 neurons—over a million! The chips are interconnected in a binary tree by 80M spike/sec links. An on-chip RAM (in each Neurocore) and an off-chip RAM (on a daughterboard, not shown) softwire vertical and horizontcal cortical connections, respectively.

Neurogrid is a piece of computer hardware that is designed specifically for simulation of biological brains. It uses analog computation to emulate ion channel activity, and digital communication to softwire structured connectivity patterns. Neurogrid simulates one million neurons[1] and six billion synapses in real time. The neurons spike at a rate of ten times a second. In terms of number of simulated neurons, it rivals simulations done by the Blue Brain Project. However, by running the simulation of whole neurons, instead of simulation on molecular level, it needs only one millionth of Blue Brain's power. The entire board consumes less than two watts of electrical energy.

Neurogrid was designed and built by the Brains in Silicon group at Stanford university. The group is led by Kwabena Boahen. The Neurogrid hardware was first up and running in late 2009. Since then it has been used to start performing simulation experiments.[2]

The Neurogrid board contains sixteen Neurocores, each of which has 256 x 256 silicon neurons in an 11.9 mm x 13.9 mm chip. An off-chip RAM and an on-chip RAM (in each Neurocore) softwire horizontal and vertical cortical connections, respectively. With 61 graded and 18 binary programmable parameters, common to all of its silicon neurons, a Neurocore can model a variety of spiking and interaction patterns.[3]

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  1. ^ Abate, Tom (April 28, 2014). "Stanford bioengineers create circuit board modeled on the human brain". Stanford News Service. Retrieved August 25, 2016. 
  2. ^ "Neurogrid: A Mixed-Analog-Digital Multichip System for Large-Scale Neural Simulations". Proceedings of the IEEE. 102: 699–716. doi:10.1109/JPROC.2014.2313565. 
  3. ^ "Our Innovation". Stanford. 

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