Neuromorphic engineering

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Neuromorphic engineering, also known as neuromorphic computing,[1][2][3] is a concept developed by Carver Mead,[4] in the late 1980s, describing the use of very-large-scale integration (VLSI) systems containing electronic analog circuits to mimic neuro-biological architectures present in the nervous system.[5] In recent times, the term neuromorphic has been used to describe analog, digital, mixed-mode analog/digital VLSI, and software systems that implement models of neural systems (for perception, motor control, or multisensory integration). The implementation of neuromorphic computing on the hardware level can be realized by oxide-based memristors,[6], spintronic memories,[7] threshold switches, and transistors.[8]

A key aspect of neuromorphic engineering is understanding how the morphology of individual neurons, circuits, applications, and overall architectures creates desirable computations, affects how information is represented, influences robustness to damage, incorporates learning and development, adapts to local change (plasticity), and facilitates evolutionary change.

Neuromorphic engineering is an interdisciplinary subject that takes inspiration from biology, physics, mathematics, computer science, and electronic engineering to design artificial neural systems, such as vision systems, head-eye systems, auditory processors, and autonomous robots, whose physical architecture and design principles are based on those of biological nervous systems.[9]


As early as 2006, researchers at Georgia Tech published a field programmable neural array.[10] This chip was the first in a line of increasingly complex arrays of floating gate transistors that allowed programmability of charge on the gates of MOSFETs to model the channel-ion characteristics of neurons in the brain and was one of the first cases of a silicon programmable array of neurons.

In November 2011, a group of MIT researchers created a computer chip that mimics the analog, ion-based communication in a synapse between two neurons using 400 transistors and standard CMOS manufacturing techniques.[11][12]

In June 2012, spintronic researchers at Purdue presented a paper on the design of a neuromorphic chip using lateral spin valves and memristors. They argue that the architecture works similarly to neurons and can therefore be used to test methods of reproducing the brain's processing. In addition, these chips are significantly more energy-efficient than conventional ones.[13]

Research at HP Labs on Mott memristors has shown that while they can be non-volatile, the volatile behavior exhibited at temperatures significantly below the phase transition temperature can be exploited to fabricate a neuristor,[14] a biologically-inspired device that mimics behavior found in neurons.[14] In September 2013, they presented models and simulations that show how the spiking behavior of these neuristors can be used to form the components required for a Turing machine.[15]

Neurogrid, built by Brains in Silicon at Stanford University,[16] is an example of hardware designed using neuromorphic engineering principles. The circuit board is composed of 16 custom-designed chips, referred to as NeuroCores. Each NeuroCore's analog circuitry is designed to emulate neural elements for 65536 neurons, maximizing energy efficiency. The emulated neurons are connected using digital circuitry designed to maximize spiking throughput.[17][18]

A research project with implications for neuromorphic engineering is the Human Brain Project that is attempting to simulate a complete human brain in a supercomputer using biological data. It is made up of a group of researchers in neuroscience, medicine, and computing.[19] Henry Markram, the project's co-director, has stated that the project proposes to establish a foundation to explore and understand the brain and its diseases, and to use that knowledge to build new computing technologies. The three primary goals of the project are to better understand how the pieces of the brain fit and work together, to understand how to objectively diagnose and treat brain diseases, and to use the understanding of the human brain to develop neuromorphic computers. That the simulation of a complete human brain will require a supercomputer a thousand times more powerful than today's encourages the current focus on neuromorphic computers.[20] $1.3 billion has been allocated to the project by The European Commission.[21]

Other research with implications for neuromorphic engineering involves the BRAIN Initiative[22] and the TrueNorth chip from IBM.[23] Neuromorphic devices have also been demonstrated using nanocrystals, nanowires, and conducting polymers.[24]

Intel unveiled its neuromorphic research chip, called "Loihi", in October 2017. The chip uses an asynchronous spiking neural network (SNN) to implement adaptive self-modifying event-driven fine-grained parallel computations used to implement learning and inference with high efficiency.[25][26]

Brainchip holdings will release an NSoC (neuromophic system on chip) processor called Akida in late 2019.[27]

Neuromemristive systems[edit]

Neuromemristive systems are a subclass of neuromorphic computing systems that focus on the use of memristors to implement neuroplasticity. While neuromorphic engineering focuses on mimicking biological behavior, neuromemristive systems focus on abstraction.[28] For example, a neuromemristive system may replace the details of a cortical microcircuit's behavior with an abstract neural network model.[29]

There exist several neuron inspired threshold logic functions[6] implemented with memristors that have applications in high level pattern recognition applications. Some of the applications reported recently include speech recognition,[30] face recognition[31] and object recognition.[32] They also find applications in replacing conventional digital logic gates.[33][34]

For ideal passive memristive circuits, it is possible to derive a differential equation for evolution of the internal memory of the circuit:[35]

as a function of the properties of the physical memristive network and the external sources. In the equation above, is the "forgetting" time scale constant, and is the ratio of off and on values of the limit resistances of the memristors, is the vector of the sources of the circuit and is a projector on the fundamental loops of the circuit. The diagonal matrix and vector and respectively, are instead the internal value of the memristors, with values between 0 and 1. This equation thus requires adding extra constraints on the memory values in order to be reliable.

See also[edit]


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