In digital circuits, one-hot refers to a group of bits among which the legal combinations of values are only those with a single high (1) bit and all the others low (0).  A similar implementation in which all bits are '1' except one '0' is sometimes called one-cold.
One-hot encoding is often used for indicating the state of a state machine. When using binary or Gray code, a decoder is needed to determine the state. A one-hot state machine, however, does not need a decoder as the state machine is in the nth state if and only if the nth bit is high.
A ring counter with fifteen sequentially-ordered states is an example of a state machine. A 'one-hot' implementation would have fifteen flip flops chained in series with the Q output of each flip flop connected to the D input of the next and the D input of the first flip flop connected to the Q output of the fifteenth flip flop. The first flip flop in the chain represents the first state, the second represents the second state, and so on to the fifteenth flip flop which represents the last state. Upon reset of the state machine all of the flip flops are reset to '0' except the first in the chain which is set to '1'. The next clock edge arriving at the flip flops advances the one 'hot' bit to the second flip flop. The 'hot' bit advances in this way until the fifteenth state after which the state machine returns to the first state.
Differences from other encoding methods
- Determining the state has a low and constant cost of accessing one flip-flop
- Changing the state has the constant cost of accessing two flip-flops
- Easy to design and modify
- Easy to detect illegal states
- Takes advantage of an FPGA's abundant flip-flops
Using a one-hot implementation typically allows a state machine to run at a faster clock rate than any other encoding of that state machine.
- Requires more flip-flops than other encodings, making it impractical for PAL devices
- Many of the states are illegal
- Harris, David and Harris, Sarah. Digital design and computer architecture (2nd ed. ed.). San Francisco, Calif.: Morgan Kaufmann. p. 129. ISBN 978-0-12-394424-5.
- Xilinx. "HDL Synthesis for FPGAs Design Guide". section 3.13: "Encoding State Machines". Appendix A: "Accelerate FPGA Macros with One-Hot Approach". 1995.
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