Persistent memory

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In computer science, persistent memory is any method or apparatus for efficiently storing data structures such that they can continue to be accessed using memory instructions or memory APIs even after the end of the process that created or last modified them.[1]

Often confused with non-volatile random-access memory (NVRAM), persistent memory is instead more closely linked to the concept of persistence in its emphasis on program state that exists outside the fault zone of the process that created it. (A process is a program under execution. The fault zone of a process is that subset of program state which could be corrupted by the process continuing to execute after incurring a fault, for instance due to an unreliable component used in the computer executing the program.)

Efficient, memory-like access is the defining characteristic of persistent memory.[2] It can be provided using microprocessor memory instructions, such as load and store. It can also be provided using APIs that implement remote direct memory access (RDMA) actions, such as RDMA read and RDMA write. Other low-latency methods that allow byte-grain[clarification needed] access to data also qualify.

Persistent memory capabilities extend beyond non-volatility of stored bits. For instance, the loss of key metadata, such as page table entries or other constructs that translate virtual addresses to physical addresses, may render durable bits non-persistent. In this respect, persistent memory resembles more abstract forms of computer storage, such as file systems. In fact, almost all existing persistent memory technologies implement at least a basic file system that can be used for associating names or identifiers with stored extents, and at a minimum provide file system methods that can be used for naming and allocating such extents.

The read-of-non-persistent-write problem[edit]

The read-of-non-persistent-write problem is found for lock-free programs on persistent memory. As compare-and-swap (CAS) operations do not persist the written values to persistent memory, the modified data can be made visible by the cache coherence protocol to a concurrent observer before the modified data can be observed by a crash observer at persistent memory. If a power failure happens right after the write is made visible but not yet persistent, the read-of-non-persistent-write problem can occur, i.e., a data variable that is modified by a CAS can be made visible to a concurrent observer before a crash observer, causing potential crash inconsistencies.

To illustrate the problem: for a singly linked lock-free list, a node can be inserted by a producer thread A after the head node, the Next pointer of the head node gets atomically switched (CAS) to point to the new node A, however, this CAS is not persisted. Then, another node gets inserted by producer thread B after Node A, as CAS for Node A is already visible to all concurrent threads. CAS atomically switches the Next pointer of Node A to point to Node B, and this CAS gets persisted. If a power failure happens at this point, the application that uses the linked list would be left in an inconsistent state, with both Node A and Node B lost, as the Next pointer from the head node to Node A has not been persisted. As Node B has been published but can’t be accessed after a reboot, and other data may have been persisted that are accessed through or dependent on Node B, all subsequent accesses to such data will not be possible, causing data loss.[3]

The read-of-non-persistent-write problem is not limited to lock-free linked lists, it can be found in any lock-free data structures where the potential gap between concurrent visibility and persistent visibility can exist. For instance, a similar problem can occur with persistent circular buffers[4]

See also[edit]

References[edit]

  1. ^ Satish M. Thatte. 1986. Persistent memory: a storage architecture for object-oriented database systems. In Proceedings on the 1986 international workshop on Object-oriented database systems (OODS '86). IEEE Computer Society Press, Los Alamitos, CA, USA, 148-159.
  2. ^ P. Mehra and S. Fineberg, "Fast and flexible persistence: the magic potion for fault-tolerance, scalability and performance in online data stores," 18th International Parallel and Distributed Processing Symposium, 2004. Proceedings., Santa Fe, NM, USA, 2004, pp. 206-. doi: 10.1109/IPDPS.2004.1303232
  3. ^ Wang, William; Diestelhorst, Stephan (June 17, 2019). "Persistent Atomics for Implementing Durable Lock-Free Data Structures for Non-Volatile Memory (Brief Announcement)". The 31st ACM Symposium on Parallelism in Algorithms and Architectures. Association for Computing Machinery. pp. 309–311. doi:10.1145/3323165.3323166. ISBN 9781450361842. S2CID 195064876 – via ACM Digital Library.
  4. ^ Wolczko, Mario (April 26, 2019). "Non-Volatile Memory and Java: Part 2". Medium.

External links[edit]