The references in this article are unclear because of a lack of inline citations. (September 2017) (Learn how and when to remove this template message)
|POWER, PowerPC, and Power ISA architectures|
|NXP (formerly Freescale and Motorola)|
|Cancelled in gray, historic in italic|
PowerQUICC is the name for several PowerPC- and Power ISA-based microcontrollers from Freescale Semiconductor. They are built around one or more PowerPC cores and the Communications Processor Module (QUICC Engine) which is a separate RISC core specialized in such tasks such as I/O, communications, ATM, security acceleration, networking and USB. Many components are System-on-a-chip designs tailor-made for embedded applications.
PowerQUICC processors are used in networking, automotive, industrial, storage, printing and consumer applications. Freescale are using PowerQUICC processors as a part of their mobileGT platform.
There are four distinct lines of processors, mainly based on processing power.
The MPC8xx family was Motorola's first PowerPC based embedded processors, suited for network processors and system-on-a-chip devices. The core is an original implementation of the PowerPC specification. It is a single issue, four stage pipelined core with MMU and branch prediction unit with speeds up to 133 MHz. The MPC821 was introduced in 1995 together with MPC860 with a complete QUICC engine. A slimmed down version, MPC850 with reduced caches and IO ports came in 1997. The QUICC communication processor module (CPM) offloads networking tasks from the CPU, thus branding this family as PowerQUICC. All processors in the family differ in on-chip features like USB, serial, PCMCIA, ATM and Ethernet controllers and different amount of L1 caches ranging from 1 KiB up to 16 KiB.
MPC8xx – All PowerQUICC processors share this common naming scheme.
- MPC821 – The first embedded PowerPC processor, with integrated CPM, but no FPU and came in speeds up to 50 MHz
- MPC860 – The first PowerPC with fully integrated QUICC engine, with speeds up to 80 MHz
- MPC850 – A low-cost, stripped MPC860 with integrated USB and Ethernet. Speeds up to 50 MHz
PowerQUICC II was introduced in 1998 and is the direct descendant of PowerPC 603e and the core also goes under the name 603e or G2. The processors still have 16/16 KiB instruction/data L1 caches, and are reaching frequencies up to 450 MHz. These communications processors are used in applications like VoIP systems, telecom switches, cellular base stations and DSLAMs. The PowerQUICC II family of processors are phased out in favour for the more powerful PowerQUICC II Pro line. There's no plans for further development of this core.
MPC82xx – All PowerQUICC II processors share this common naming scheme.
PowerQUICC II Pro
Introduced in 2004, based on the e300 core, an enhanced PowerPC 603e core, with 32/32 KiB instruction/data L1 caches. PowerQUICC II Pro is used as networking processors for routers, switches, printers, network-attached storage, wireless access points and DSLAMs. PowerQUICC II Pro processors reaches 677 MHz, and can include a multitude of embedded technologies like USB, PCI, Ethernet and security devices. They also use a newer QUICC Engine network offload engine instead of the CPM used in the original PowerQUICC I and PowerQUICC II series. The memory controller provides support for DDR and DDR2 SDRAMs.
MPC83xx – All PowerQUICC II Pro processors share this common naming scheme. A trailing "E" signifies that the processors have a built in encryption module. All devices with an 834x name lacks the quicc engine, while devices with a number like 836x has one.
- MPC8321E – low end for easy transition from MPC8xx family
- MPC8343E – used in the "Killer NIC" network card.
The PowerQUICC III processors are based on a 32-bit Power ISA v.2.03 core called e500, introduced in 2003. It has a dual issue, seven-stage pipeline with double precision FPUs, 32/32 KiB data and instruction L1 caches, multiple Gigabit Ethernet, PCI and PCIe, RapidIO, DDR/DDR2 memory controllers, and security accelerators. Speeds ranges from 533 MHz up to 1.5 GHz. These processors target enterprise level networking and telecom applications, high end storage, printing and imaging. Some of the processors use the older CPM module for the handling network processing offload, some use the newer QUICC Engine (same as in PowerQUICC II Pro), and some do not have a CPM or QUICC Engine at all. Freescale's marketing department nevertheless brand all devices in the 85xx series as being "PowerQUICC III".
MPC85xx – All PowerQUICC III processors share this common naming scheme. A trailing "E" signifies that the processors have a built-in encryption module.
- MPC8540 – The world's first RapidIO enabled host processor. Includes dual Gigabit Ethernet controllers, ideal for routers. Speeds from 600 MHz to 1 GHz.
- MPC8548/47/43/41(E) – A family of integrated devices included PCI Express and RapidIO, along with a single e500 core. Each lower number has fewer abilities than its higher-numbered siblings.
- MPC8544 – Similar to the 8548, but produced in a cost-saving 90 nm process and with some differences in the actual feature set.
- MPC8560 – Similar to the 8540, this was the first PQ III device launched. It includes a CPM along with the e500 core.
- MPC8568/68E/67/67E – Uses the QUICC Engine instead of a CPM, the 8567 has a reduced set of peripheral units.
- MPC8569E – e500v2 core frequency of 1.33 GHz, 45 nm fabrication process, enhanced QUICC engine, rich set of peripherals and low power requirements.
- MPC8572E – Uses dual e500 cores with speed up to 1.5 GHz. Used in high end application-aware networking equipment like firewalls and antivirus devices (from Kaspersky Lab).
PowerQUICC will[when?] cease development in favor of the software-compatible QorIQ platform featuring all PowerPC e500 based processors, from single core, through multi-core, up to 32 cores. Freescale will[when?] keep manufacturing PowerQUICC processors in the foreseeable future for existing customers, but they will[when?] help facilitate the transition to QorIQ.
- Freescale's Power Architecture portfolio
- Freescale Power Architecture White paper - "From Somerset to SoC"
- Halfhill, Tom R. (21 March 2005). "Freescale Quickens PowerQUICC". Microprocessor Report.