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A resistor–capacitor circuit (RC circuit), or RC filter or RC network, is an electric circuit composed of resistors and capacitors. It may be driven by a voltage or current source and these will produce different responses. A first order RC circuit is composed of one resistor and one capacitor and is the simplest type of RC circuit.
RC circuits can be used to filter a signal by blocking certain frequencies and passing others. The two most common RC filters are the high-pass filters and low-pass filters; band-pass filters and band-stop filters usually require RLC filters, though crude ones can be made with RC filters.
There are three basic, linear passive lumped analog circuit components: the resistor (R), the capacitor (C), and the inductor (L). These may be combined in the RC circuit, the RL circuit, the LC circuit, and the RLC circuit, with the acronyms indicating which components are used. These circuits, among them, exhibit a large number of important types of behaviour that are fundamental to much of analog electronics. In particular, they are able to act as passive filters. This article considers the RC circuit, in both series and parallel forms, as shown in the diagrams below.
The simplest RC circuit consists of a resistor and a charged capacitor connected to one another in a single loop, without an external voltage source. Once the circuit is closed, the capacitor begins to discharge its stored energy through the resistor. The voltage across the capacitor, which is time-dependent, can be found by using Kirchhoff's current law. The current through the resistor must be equal in magnitude (but opposite in sign) to the time derivative of the accumulated charge on the capacitor. This results in the linear differential equation
where C is the capacitance of the capacitor.
Solving this equation for V yields the formula for exponential decay:
where V0 is the capacitor voltage at time t = 0.
In this formula, τ is measured in seconds, R in ohms and C in farads.
- j represents the imaginary unit: j2 = −1,
- σ is the exponential decay constant (in nepers per second), and
- ω is the sinusoidal angular frequency (in radians per second).
Sinusoidal steady state
Sinusoidal steady state is a special case in which the input voltage consists of a pure sinusoid (with no exponential decay). As a result, and the impedance becomes
and the voltage across the resistor is:
The transfer function from the input voltage to the voltage across the capacitor is
Similarly, the transfer function from the input to the voltage across the resistor is
Poles and zeros
Both transfer functions have a single pole located at
Gain and phase
The magnitude of the gains across the two components are
and the phase angles are
These expressions together may be substituted into the usual expression for the phasor representing the output:
The current in the circuit is the same everywhere since the circuit is in series:
The impulse response for each voltage is the inverse Laplace transform of the corresponding transfer function. It represents the response of the circuit to an input voltage consisting of an impulse or Dirac delta function.
The impulse response for the capacitor voltage is
Similarly, the impulse response for the resistor voltage is
where δ(t) is the Dirac delta function
These are frequency domain expressions. Analysis of them will show which frequencies the circuits (or filters) pass and reject. This analysis rests on a consideration of what happens to these gains as the frequency becomes very large and very small.
As ω → ∞:
As ω → 0:
This shows that, if the output is taken across the capacitor, high frequencies are attenuated (shorted to ground) and low frequencies are passed. Thus, the circuit behaves as a low-pass filter. If, though, the output is taken across the resistor, high frequencies are passed and low frequencies are attenuated (since the capacitor blocks the signal as its frequency approaches 0). In this configuration, the circuit behaves as a high-pass filter.
The range of frequencies that the filter passes is called its bandwidth. The point at which the filter attenuates the signal to half its unfiltered power is termed its cutoff frequency. This requires that the gain of the circuit be reduced to
Solving the above equation yields
which is the frequency that the filter will attenuate to half its original power.
Clearly, the phases also depend on frequency, although this effect is less interesting generally than the gain variations.
As ω → 0:
As ω → ∞:
So at DC (0 Hz), the capacitor voltage is in phase with the signal voltage while the resistor voltage leads it by 90°. As frequency increases, the capacitor voltage comes to have a 90° lag relative to the signal and the resistor voltage comes to be in-phase with the signal.
- This section relies on knowledge of e, the natural logarithmic constant.
The most straightforward way to derive the time domain behaviour is to use the Laplace transforms of the expressions for VC and VR given above. This effectively transforms jω → s. Assuming a step input (i.e. Vin = 0 before t = 0 and then Vin = V afterwards):
These equations are for calculating the voltage across the capacitor and resistor respectively while the capacitor is charging; for discharging, the equations are vice versa. These equations can be rewritten in terms of charge and current using the relationships C = Q/V and V = IR (see Ohm's law).
Thus, the voltage across the capacitor tends towards V as time passes, while the voltage across the resistor tends towards 0, as shown in the figures. This is in keeping with the intuitive point that the capacitor will be charging from the supply voltage as time passes, and will eventually be fully charged.
These equations show that a series RC circuit has a time constant, usually denoted τ = RC being the time it takes the voltage across the component to either rise (across the capacitor) or fall (across the resistor) to within 1/e of its final value. That is, τ is the time it takes VC to reach V(1 − 1/e) and VR to reach V(1/e).
The rate of change is a fractional 1 − 1/e per τ. Thus, in going from t = Nτ to t = (N + 1)τ, the voltage will have moved about 63.2% of the way from its level at t = Nτ toward its final value. So the capacitor will be charged to about 63.2% after τ, and essentially fully charged (99.3%) after about 5τ. When the voltage source is replaced with a short circuit, with the capacitor fully charged, the voltage across the capacitor drops exponentially with t from V towards 0. The capacitor will be discharged to about 36.8% after τ, and essentially fully discharged (0.7%) after about 5τ. Note that the current, I, in the circuit behaves as the voltage across the resistor does, via Ohm's Law.
These results may also be derived by solving the differential equations describing the circuit:
The first equation is solved by using an integrating factor and the second follows easily; the solutions are exactly the same as those obtained via Laplace transforms.
Consider the output across the capacitor at high frequency, i.e.
This means that the capacitor has insufficient time to charge up and so its voltage is very small. Thus the input voltage approximately equals the voltage across the resistor. To see this, consider the expression for given above:
but note that the frequency condition described means that
which is just Ohm's Law.
which is an integrator across the capacitor.
Consider the output across the resistor at low frequency i.e.,
This means that the capacitor has time to charge up until its voltage is almost equal to the source's voltage. Considering the expression for I again, when
which is a differentiator across the resistor.
More accurate integration and differentiation can be achieved by placing resistors and capacitors as appropriate on the input and feedback loop of operational amplifiers (see operational amplifier integrator and operational amplifier differentiator).
PWM Averaging Responses
We begin with the analysis using the capacitor definition:
In this circuit, the current i is noted to be (E-v)/R if v is the average capacitor voltage and E is a constant DC voltage.. This gives us:
Since E takes on two values here, both E (a particular DC voltage) and 0 (zero voltage) we need two equations, one when it is E and one when it is zero. The second equation is the same with E set to zero and the polarity of v made positive since when the cap is discharging v is some positive value. This gives us:
Now simply multiply both sides of this set of equations by C (and RC=R*C) we get:
dv/dt=(E-v)/RC (when the PWM input E is high)
dv/dt=v/RC (when the PWM input E is zero)
The time increment dt is only the same for a 50 percent PWM duty cycle, so we need a more general expression. For this we simply set each time increment dt to a unique value:
Now simply solve for dv in each equation:
Now applying the theory of Continuity of States, we can say that these two values for dv must be the same when the voltage across the capacitor is at its average value. That is because when the voltage goes up starting at a certain lower value it must later come down to the same lower voltage or else the voltage is not yet at its average value. So noting that, we can equate the two:
and now solving for the average voltage v we get:
Now we could stop here and note that v is the average voltage across the cap and dt1 is the 'on' time and dt2 is the 'off' time, but in most cases we want to relate this to the duty cycle D. It is quite simple to note that if we know the total time period tp we can equate these two:
where D is the fractional duty cycle (0.30 is 30 percent for example) and so substituting those two into the previous solution for v we end up with:
and when we simplify this expression we get:
A very simple result! So the average voltage is D*E and we might immediately note that the actual values of R and C did not matter. That is actually the case for any values as long as the capacitor voltage does not get close to zero or E for either the 'on' or 'off' periods. Later when we calculate the peaks, we will find that the R and C values do not matter if RC>>tp but if the RC time constant is comparable to the total time period tp then we will find a difference in the upper and lower peaks of the time domain calculations and the upper and lower peaks of the averaged calculations, although the differences may be small.
A simple example is when E=10v and D=0.25, the average voltage v is 2.5 volts.
Another simple example is when E=20v and D=0.50, the average voltage is 10 volts.
Next we will calculate the two peak values, the upper peak and the lower peak. There are at least two ways to do this one using an averaging technique and another using a straight up time domain solution. The averaging technique assumes a short total time period tp while the time domain solution assumes nothing except ideal components (as is typical in theoretical solutions).
Using the averaging technique, we note that previously we got the result for the low to high going capacitor voltage deviation as:
and we substituted dt1=D*tp and got:
and we assumed that 'v' was the average voltage. Since 'v' was the average voltage and we later calculated that as:
we insert that into the above expression and end up with:
and that is the entire deviation from lowest point to highest point across the capacitor, often referred to as the voltage peak to peak.
Since that is the entire deviation and in the straight line approximation it is triangular and a triangular wave has average that is 1/2 of its entire amplitude peak to peak, to get the excursion above the average we just divide that in half. For the same reason the amplitude below the average will also be one half of that.
We might note that the RC values do in fact make a difference for this calculation even though the did not matter for the average calculation.
Example: R=1000 Ohms, C=100uf, tp=0.001 seconds, E=10 volts, D=0.50 (50 percent duty cycle)
Result: dv=0.025 volts peak to peak.
Positive excursion: 0.025/2=0.0125 volts peak
Negative excursion: 0.025/2=0.0125 volts peak
Also noteworthy is that if we calculate the maximum of dv with respect to a variation in D the duty cycle, we will find that the value of D that causes the highest voltage peak to peak is D=0.50 which is a 50 percent duty cycle.
The parallel RC circuit is generally of less interest than the series circuit. This is largely because the output voltage Vout is equal to the input voltage Vin — as a result, this circuit does not act as a filter on the input signal unless fed by a current source.
With complex impedances:
This shows that the capacitor current is 90° out of phase with the resistor (and source) current. Alternatively, the governing differential equations may be used:
When fed by a current source, the transfer function of a parallel RC circuit is:
It is sometimes required to synthesise an RC circuit from a given rational function in s. For synthesis to be possible in passive elements, the function must be a positive-real function. To synthesise as an RC circuit, all the critical frequencies (poles and zeroes) must be on the negative real axis and alternate between poles and zeroes with an equal number of each. Further, the critical frequency nearest the origin must be a pole, assuming the rational function represents an impedance rather than an admittance.
The synthesis can be achieved with a modification of the Foster synthesis or Cauer synthesis used to synthesise LC circuits. In the case of Cauer synthesis, a ladder network of resistors and capacitors will result.
- Horowitz & Hill, p. 1.13
- Bakshi & Bakshi, pp. 3-30–3-37