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Rapid single flux quantum

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In electronics, rapid single flux quantum (RSFQ) is a digital electronic device that uses superconducting devices, namely Josephson junctions, to process digital signals. In RSFQ logic, information is stored in the form of magnetic flux quanta and transferred in the form of Single Flux Quantum (SFQ) voltage pulses. RSFQ is one family of superconducting or SFQ logic. Others include Reciprocal Quantum Logic (RQL), ERSFQ – energy-efficient RSFQ version that does not use bias resistors, etc. Josephson junctions are the active elements for RSFQ electronics, just as transistors are the active elements for semiconductor electronics. RSFQ is a classical digital, not quantum computing, technology.

RSFQ is very different from the CMOS transistor technology used in conventional computers:

  • Superconducting devices require cryogenic temperatures.
  • picosecond-duration SFQ voltage pulses produced by Josephson junctions are used to encode, process, and transport digital information instead of the voltage levels produced by transistors in semiconductor electronics.
  • SFQ voltage pulses travel on superconducting transmission lines which have very small, and usually negligible, dispersion if no spectral component of the pulse is above the frequency of the energy gap of the superconductor.
  • In the case of SFQ pulses of 1 ps, it is possible to clock the circuits at frequencies of the order of 100 GHz (one pulse every 10 picoseconds).

An SFQ pulse is produced when magnetic flux through a superconducting loop containing a Josephson junction changes by one flux quantum, Φ0 as a result of the junction switching. SFQ pulses have a quantized area ʃV(t)dt = Φ02.07×10−15 Wb = 2.07 mV⋅ps = 2.07 mA⋅pH due to magnetic flux quantization, a fundamental property of superconductors. Depending on the parameters of the Josephson junctions, the pulses can be as narrow as 1 ps with an amplitude of about 2 mV, or broader (e.g., 5–10 ps) with correspondingly lower amplitude. The typical value of the pulse amplitude is approximately 2IcRn, where IcRn is the product of the junction critical current, Ic, and the junction damping resistor, Rn. For Nb-based junction technology IcRn is on the order of 1 mV.


  • Interoperable with CMOS circuitry, microwave and infrared technology
  • Extremely fast operating frequency: from a few tens of gigahertz up to hundreds of gigahertz
  • Low power consumption: about 100,000 times lower than CMOS semiconductors circuits, without accounting for refrigeration
  • Existing chip manufacturing technology can be adapted to manufacture RSFQ circuitry
  • Good tolerance to manufacturing variations
  • RSFQ circuitry is essentially self clocking, making asynchronous designs much more practical.


  • Requires cryogenic cooling. Traditionally this has been achieved using cryogenic liquids such as liquid nitrogen and liquid helium. More recently, closed-cycle cryocoolers, e.g., pulse tube refrigerators have gained considerable popularity as they eliminate cryogenic liquids which are both costly and require periodic refilling. Cryogenic cooling is also an advantage since it reduces the working environment's thermal noise.
  • The cooling requirements can be relaxed through the use of high-temperature superconductors. However, only very-low-complexity RFSQ circuits have been achieved to date using high-Tc superconductors. It is believed that SFQ-based digital technologies become impractical at temperatures above ~ 20 K – 25 K because of the exponentially increasing bit error rates (thermally-induced junction switching) cause by decreasing of the parameter EJ/kBT with increasing temperature T, where EJ = IcΦ0/2π is the Josephson energy.
  • Static power dissipation that is typically 10–100 times larger than the dynamic power required to perform logic operations was one of the drawbacks. However, the static power dissipation was eliminated in ERSFQ version of RSFQ by using superconducting inductors and Josephson junctions instead of bias resistors, the source of the static power dissipation.



See also



  1. ^ Yerosheva, Lilia Vitalyevna; Peter M. Kogge (April 2001). "High-Level Prototyping for the HTMT Petaflop Machine (2001)". Department of Computer Science and EngineeringNotre Dame, Indiana. CiteSeerX {{cite journal}}: Cite journal requires |journal= (help)
  2. ^ Bunyk, Paul, Mikhail Dorojevets, K. Likharev, and Dmitry Zinoviev. "RSFQ subsystem for HTMT petaFLOPS computing." Stony Brook HTMT Technical Report 3 (1997).