SDS 930

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SDS 930 at Swissair, 1966

The SDS 930 is a commercial 24-bit computer using bipolar junction transistors sold by Scientific Data Systems. It was announced in December 1963, with first installations in June 1964.[1]


An SDS 930 system consists of at least three standard (30 cu ft, 0.85 m3) cabinets, comprising the arithmetic and logic unit, at least 8,192 words (24-bit + simple parity bit) magnetic-core memory, and the IO unit. Two's complement integer arithmetic is used. The machine has integer multiply and divide, but no floating-point hardware.[2] An optional correlation and filtering unit (CFE) can be added, which is capable of very fast floating-point multiply-add operations (primarily intended for digital signal processing applications).

Weighed about 3,200 pounds (1.6 short tons; 1.5 t).[3]

A free-standing console is also provided, which includes binary displays of the machine's registers and switches to boot and debug programs. User input is by a Teletype Model 35 ASR unit and a high-speed paper-tape reader (300 cps). Most systems include at least two magnetic-tape drives, operating at up to 75 in/s at 800 bpi. The normal variety of peripherals is also available, including magnetic-drum units, card readers and punches, and an extensive set of analog-digital/digital-analog conversion devices. A (vector mode) graphic display unit is also available, but it does not include a means of keyboard input.

The SDS 930 is a typical small- to medium-scale scientific computer of the 1960s. Speed is good for its cost, but with an integer add time of 3.5 microseconds, it is not in the same league as the scientific workhorses of the day (the CDC 6600, for example). A well equipped 930 can easily exceed 10 cabinets and require a 300–500 sq ft (28–46 m2) climate-controlled room. The price of such a system in 1966 would be in the neighborhood of $500K.

Programming languages available include FORTRAN II, ALGOL 60, and the assembly language known as Meta-Symbol. The FORTRAN system is very compact, having been designed and implemented by Digitek for SDS to compile and run in 4,096 word SDS 900 series machines. To do anything useful in such small memory space, the compiler relies on an SDS architectural feature known as Programmed OPeratorS, or POPS. This feature consists of a single bit in the instruction word that causes the machine to "mark place and branch" to the memory address of the instruction code value plus 100 (octal). As a result, pseudo instructions can be defined and implemented yielding very compact special-purpose code. Both the FORTRAN compiler and runtime take advantage of this capability.[4][5]

Towards the end of the SDS 930's market lifetime a real-time monitor system was introduced, which included a FORTRAN IV compiler.[6] Neither the operating system nor the compiler were used heavily by customers. Many organizations modified and enhanced the 930's hardware. Project Genie at the University of California, Berkeley, added hardware to permit time-sharing with the Berkeley Timesharing System. These changes later formed the basis for the SDS 940. Other operating systems were also written for the machine by customers, including Arachnid (Spider) at the University of Texas at Austin.

SDS 930s could be found at most of the major US government labs at the time, including Los Alamos Scientific Laboratory. Early flight simulators used the SDS 930, because of its hardware integer multiply and divide capability and its real-time data acquisition and control peripheral modules. The machines are particularly well suited to this and other kinds of data acquisition and real-time analysis, as well as to serving as a digital control system for analog-hybrid systems.

The Surface Ship ASW Attack Trainer (Device 14A2A) used a SDS 930 computer and was designed to train the ASW attack team of a US Navy destroyer in submarine warfare by providing realistic simulations ashore with cost savings in operating time and expense at sea. [7]

By 1974 estimates, there were about 200 SDS-930/940/945 computers still installed.[1]


  1. ^ a b Keith G. Calkins (June 1984). "The COMPUTER That Will Not Die: The SDS SIGMA 7". 5th TeleExchange Proceedings. Orlando, Florida. Retrieved April 21, 2011.
  2. ^ SDS 930 Computer Reference Manual (PDF). SDS 90 00 64F. Scientific Data Systems. November 1969.
  3. ^ CPU (single memory bank): 1150 lb, PS cabinet: 1200 lb, I/O cabinet: 700 lb, control console: 150 lb. See "SDS 930 documents". 900066C_930_Technical_Manual_Feb66.pdf, p. 1–6 (19).
  4. ^ A programmed operator was a hardware concept on the SDS 900 series of computers similar to the concept of the Atlas computer's "extracodes". The programmed operator calling mechanism allowed computer operation codes to be interpreted by software code. See Scientific Data Systems, "SDS 900 Series", technical manual. Cf. Programmed Operator. Also see "SDS 910 Reference Manual", February 1970. Cf. Appendix E. page A-19, "Programmed Operators" for an in-depth discussion of Programmed Operators.
  5. ^ Bell, Gordon, "Computer Structures: Readings and Examples", Section 6: Processors with multiprogramming ability, p.275. "The [SDS] 940 uses a memory map which is almost a subset of that of Atlas but is more modest than that of the IBM 360/67 [Arden et al., 1966] and GE 645 [Dennis, 1965; Daley and Dennis, 1968]. A number of instructions are apparently built in via the programmed operator calling mechanism, based on Atlas extracodes (Chap. 23). The software-defined instructions emphasize the need for hardware features. For example, floating-point arithmetic is needed when several computer-bound programs are run. The SDS 945 is a successor to the 940, with slightly increased capability but at a lower cost."
  6. ^ Scientific Data Systems (Feb 1966). SDS Real-Time MONITOR (PDF). Retrieved Dec 23, 2015.
  7. ^ Sophisticated ASW Devices Now Operating in the Navy. Naval Training Bulletin. Winter 1966-1967. page 34-38.

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