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This article should be listed in

Done. -- 19:08, 7 December 2006 (UTC)

5b6b code[edit]

There's also a 5b6b code, used by some IEEE 802 class standard. A 5-bit input block makes a 6-bit , DC-balanced output block.

Output blocks are either DC-balanced (overall disparity 0), or are assigned in pairs, (overall disparity ±2). The latter codes are assigned in pairs, and the member of the pair chosen that will drive the running disparity toward 0.

Because input blocks have an odd number of bits, they always have an odd disparity. Blocks with a disparity of ±1 are output by appending one more bit, chosen to make the overall disparity 0.

Blocks with disparities ±3 and ±5 are assigned pairs of codes, as follows. Note that the pairs are bitwise complements, so the encoder only needs to store one value, and optionally invert it.

Input Output
00000 010111 101000
00001 100111 011000
00010 011011 100100
00100 101011 010100
01000 110011 001100
10000 011101 100010
11110 110110 001001
11101 101110 010001
11011 111001 000110
10111 110101 001010
01111 101101 010010
11111 111010 000101

Why (0,3) RLL, when GCR gives (0,2) RLL?[edit]

One thing that's puzzled me is why FDDI chose a code with up to three zeros between ones (sync edges), when codes were already known (GCR) that limited. Does it have something to do with DC bias? But the code isn't DC-balanced... (talk) 14:01, 13 March 2009 (UTC)

FDDI control codes[edit]

FDDI uses TT as Ending Delimiter for Tokens

FDDI uses TRRR as minimum End of Frame Sequence for Data Frames

Repeaters may change an R to an S

A received Data Frame is invalid if the first two symbols of the End of Frame Sequence are not TR

FDDI-II defines other control code sequences for Cycle Control and for Tokens and Data within the Packet Channel (talk) 20:16, 11 June 2010 (UTC)