- 1 Reference list
- 2 Article needs information about phisical design
- 3 Article needs diagrams
- 4 Old discussion
- 5 best-selling CPUs
- 6 data processing capabilities and bcd
- 7 No mention of out-of-order execution
- 8 a large bed
- 9 feature proximity
- 10 more futuristic ideas
- 11 split this page?
- 12 myth of smaller sets of instructions
- 13 High-end processor economics
- 14 clockless CPUs
- 15 needs refs
- 16 Proposed merger
- 17 Too shallow on a too abstract level
- 18 Embedded Design
- 19 how many people does it take to make a CPU?
- 20 Tags
- 21 permission to use an instruction set
How do you edit the reference list so the bullet points and numbers match? The reference list automatically puts a number to the references but what do you do for the articles that are just a bare url with a bullet point?
Article needs information about phisical design
Article needs diagrams
- I think it is essential for this article to display some diagrams that condense and clarify the explanations. I think it's a daunting task to try to understand processor architecture concepts and examples without diagrams. Technical users will have no trouble understanding this immense desolate text, but 'casual' readers and researchers (most people I guess) will likely be disheartened and confused. Can someone with some knowledge in the subject upload/make some simple diagrams? --Cbohorquezm 21:00, 8 May 2006 (UTC)
Okay, a pretty big edit. Divided the article into sections. Added a bunch of stuff, cleared up the difference between pipelining and superscalar. I think an improved opening paragraph (betwee "general cpu design" and "1960") would be helpful... might do it later. The stuff at the end (under "additional considerations"), some of it I don't think is appropriate for discussions on CPU design (such as the laser-diode bus replacement...). Also, I don't know much about embedded processor design, so I just left that in its own section at the bottom.
Would it be a good idea to have sample designs under each part? Like "486" as an example of a pipelined processor, "Pentium Pro" as an example scalar processor, and Pentium(II? III? I forget) as an example super-scalar processor?
Also, would it be more appropriate to divide this into multiple articles... like an article on instruction pipelining, and take out most of the discussion on that, and a seperate one for superscalar desgin, and for VLIW, etc. etc. There's already a lot of overlap between this and the CISC and RISC articles.
What is a "one-off design"? This does not seem to be in English. David 20:21 Nov 13, 2002 (UTC)
If no one replies, I'll delete it. David 22:36 Nov 19, 2002 (UTC)
The topic of this article is CPU design. Several paragraphs at the end of the article are not relevant to CPU design but to Computer Architecture, a different topic. I suggest they be deleted. Namely the paragraphs talking about real-time schedulers, and virtual memory. Aug 17, 2004.
- the article refers to "solid-state RAM"... is there any other (relevent) kind? i guess you can make mechanical logic, and thus, mechanical SRAM, but i don't think thats what the author has in mind.
As a matter of fact- CRTs were used as RAM. Up until that point, acoustic delay lines were used for computer memory. It was awfully slow to wait for the right bits to come around. Core memory was the first solid-state RAM, embraced because it worked so much better than CRT-based RAM.
I removed some text that seemed inaccurate to me. The author had 32-bit ARMs universally replacing 8-bit processors. Engineers use what's cheapest, and 8-bit CPUs and cores are often smaller and cheaper. Embedded defibrillators, one of the lowest-powered devices on the planet (16 nanoamperes draw), generally use a CMOS CISC core of the 68HC11. The last time I checked, the world's best-selling CPU was an 8-bit CISC microcontroller, the Motoroloa 6809. Also, the 6502 is an 8-bit RISC machine, not a CISC. The 6502 even uses combinatorial decoding of instructions, with no microcode. The Acorn RISC Machine (ARM) was designed as a 32-bit 6502.
I think it's debatable whether the 6502 is RISC or CISC. The 6502 has variable-length instructions (RISC almost all have fixed-length instructions), and a few instructions that do 2 zero-page memory reads and a general memory write (RISC almost all have at most a single memory reference per instruction). --DavidCary 22:51, 17 Aug 2004 (UTC)
- It would be really cool to have a historical table of the world's best-selling CPU (and its volume) year-by-year. --DavidCary 22:51, 17 Aug 2004 (UTC)
- After further thought, I think Talk:List of common microcontrollers is a better place for discussing the variety of best-selling CPUs over the years, and their volume. --DavidCary (talk) 06:14, 28 June 2014 (UTC)
data processing capabilities and bcd
The article says that "the S/360 [had] the first instruction set designed for data processing, rather than mathematical calculation. I do not believe that this is accurate, given the instruction of the UNIVAC I, the IBM 1401 and others, where mathematical calculations were definitely NOT the only objective.
Additionally, the article states that "the S/360 system was the first computer to make major use of binary coded decimal". Again, to contradict this, the 1401, a predecessor of the S/360 used BCD for its numerical format, as did the IBM 1620.
No mention of out-of-order execution
This article is missing the major computer architecture topic of the 90's - out-of-order execution. It jumps from superscalar to speculative execution & VLIW (neither technique fully successful in the market) while out-of-order chips are selling in the 100's of millions each year (complete success). It was the complexity of OOO execution which started VLIW to be re-examined by research. Dyl 06:34, Aug 12, 2004 (UTC)
a large bed
The article currently says
- IBM does have a large bed, VERY large. Of course, on the other hand, IBM may sort of NEED to get all of these customers on-board if they want to stay on top of the CPU development game.
Huh ? What do you mean by "bed" ? --DavidCary 22:51, 17 Aug 2004 (UTC)
Those few paragraphs talking about IBM are:
- not NPOV
- talk about the economics of processor manufacture, not CPU design directly (or even computer architecture)
So in my opinion, are not appropriate for this article. Dyl 22:47, Sep 22, 2004 (UTC)
thoughts? - Brewthatistrue 23:53, 24 Jun 2005 (UTC)
Sounds blue sky, but that doesn't stop mention in articles. It doesn't belong in the CPU design article, though. Maybe in the Packaging section of Integrated circuit. -R. S. Shaw 02:33, 25 Jun 2005 (UTC)
more futuristic ideas
"Baby Steps to our Future: Future Microprocessors" by Ron Fenley http://www.hal-pc.org/journal/03feb/column/baby/baby.html
split this page?
I'm thinking about splitting this page into multiple articles:
- History of General Purpose CPUs
- CPU Design (current sections on actually how to build a CPU)
- CPU Architectural concepts
- Embedded CPUs
The title "design" doesn't match most of the contents, which is computer architecture/microarchitecture. Comments? Dyl 07:27, 1 February 2006 (UTC)
- This article could definitely use refocusing. Regarding the mentioned subject areas:
- History of General Purpose CPUs
- CPU Design (current sections on actually how to build a CPU)
- Yes, this should be the content of this article.
- CPU Architectural concepts
- These matters should be in a separate article. There already exists an article Computer architecture, which is in great need of additional and better material. Applicable text in this article should be removed and merged into Computer architecture (or conceivably other articles in Category:Computer architecture). There is also a Microarchitecture article that deals with the physical CPU architecture.
- Embedded CPUs
- -R. S. Shaw 04:27, 2 February 2006 (UTC)
myth of smaller sets of instructions
This article (currently) perpetuates the myth that the "reduced" in RISC means that there are fewer instructions in the instruction set.
I'm pretty sure that the people designing RISC processors didn't really care too much about how many instructions were in the instruction set.
Instead, designers tried to simplify, or "reduce", individual instructions so that individual instructions could be executed very fast. "Fast" in 2 ways:
- try to get things "done" as quickly as possible after one clock tick -- so that they could reduce the time from one clock tick to the next. Since the clock speed of a CPU is limited by the *slowest* instruction, even if the program currently running on it never uses that instruction, simplifying that one instruction (perhaps by breaking it into 2 or 3 new instructions, expanding the instruction set) allows one to speed up the clock speed, speeding up all the other instructions.
- try to change the hardware so instructions executed in fewer clock ticks (preferably in a single cycle). Having a fixed limit of "all instructions execute in 1 cycle" also simplifies pipelining and eliminates microcode, indirectly leading to faster clock speed.
High-end processor economics
Under this heading:
4 Markets 4.1 General Purpose Computing 4.1.1 High-end processor economics
I'm not sure if Fujitsu is making it's own high-end processors. If it is a source needs to be added. Thanks. Scifiintel 18:55, 25 February 2007 (UTC)
- In the article, I just added the external link for it . Dyl 13:19, 26 February 2007 (UTC)
The sequential logic article currently links to
[[CPU_design#clockless_CPUs]], a section of this article that apparently no longer exists. To which article has that information moved? Or was it accidentally deleted and needs to be restored? --220.127.116.11 04:53, 26 July 2007 (UTC)
As far as I can tell, that section was accidentally deleted in this summary-less edit: http://en.wikipedia.org/w/index.php?title=CPU_design&diff=prev&oldid=109091120 . So I am restoring that accidental deletion. If it was really *moved* to some other article, not deleted, please tell me to where it moved. --18.104.22.168 (talk) 02:28, 13 February 2008 (UTC)
I see now there are 2 copies of that "clockless CPU" section. One here in "CPU design". The other in History of general purpose CPUs. What should we do about it? --22.214.171.124 (talk) 04:08, 13 February 2008 (UTC)
- The deletion in Feb '07 was not accidental. You can see that user:Dyl added it to History of general purpose CPUs in this edit the same day the text was deleted from here. (He failed to note this in the latter edit summary, although the former indicates it.) The text needs to be in the right place and deleted from the other(s). Sequential logic can point whereever it ends up. I didn't think it fit well in this article, but it doesn't seem to fit all that well in the history article either. Maybe it belongs in some third article. -R. S. Shaw (talk) 06:43, 13 February 2008 (UTC)
- Yes I moved that content. This article is a brief introduction to this topic. I didn't see the sense of including a few areas of very esoteric research. These specific areas (optical and clockless) are very far from the mainstream. There are many other areas of research that are more popular - chip-multiprocessing, run-ahead fetching, etc. Dyl (talk) 06:45, 14 February 2008 (UTC)
I found this a very interesting article to read, but it lacks refs. I've placed one fact tag in the economics section, but it really needs more. I'm hesitant to add the refimprove or related tags. Yngvarr 13:54, 31 August 2007 (UTC)
The merger tag occured without anyone explaining why. Typical! A note and a reason should be put here, when placing a merger tag on the page, uglifying it. I think that a merger is unjustified. It's a common practice to have a short overview section in a main article and a longer detailed article on a more specific topic. I think the state as it is now, is pretty OK. However: the text in Central_processing_unit#Design_and_implementation could, if a mayhap editor get an arbitrary impulse to do so, be shrinked, and text moved to CPU design; or the other way around. It's not necessary to ask, or get a consensus over such a thing. Just do it! (Be bold!) Waiting for consensuses just takes a lot of time, sometimes to no avail. Use consensus as a tool mainly when conflicts arise. Said: Rursus ☻ 08:30, 9 June 2008 (UTC)
Too shallow on a too abstract level
I would like to have some "child-taleish" description like, the CPU has one or more registers, usually called A, B, C and similar. The CPU works by, one by one in sequence, pick an opcode from a list of opcodes, which is the program. The opcode is "interpreted" in a certain way, so that "F3" represents adding the value in B to A, setting the flags this-or-that if the number overflows, or "E8" "something" represents loading a value from memory at position numbered something.
The tale should go as following:
- CPU has registers/accumulators who are ... ,
- CPU reads a sequence of opcodes this that ... ,
- the PC (program counter) is a register that CPU keeps, in order to remember where in program code it picks opcode instructions ...,
- values can be added to or subtracted from PC, the instructions are called JUMP-this, JREL-that, in short "jumps", when such values are added, the CPU resumes execution at another place in the code,
- the SP (stack pointer) is another register that CPU uses to save and restore values,
- ... similar as for jumps but regarding CALLs/RETURNs involving saving position before calling ...
Then maybe a stop (?)
Related topic: Anybody who knows how many general CPU registers (SP, PC, cache and similar uncounted) that this or that CPU family has? It seems to me that the Intel family x86 has EAX, EBX, ECX and EDX summing to four. PowerPC? RSx000 (Nintendo?)? 68x00? Said: Rursus ☻ 08:47, 9 June 2008 (UTC)
- I think that x86 has 8 general purpose registers, x64 has 16 and the RISC architectures (Alpha, MIPS, Power, SPARC and HP-PA) has 32 fixed point registers along with 32 floating point registers. Earlier revisions of SPARC and HP-PA may have less though, but I can't remeber how many. Rilak (talk) 08:58, 9 June 2008 (UTC)
- Very good, thanks! I'll take a look outside WP to find relevant sources. Regarding my own proposal of content: its partially already written (on an abstract level) in Central processing unit#CPU operation, so the proposal can safely be ignored, until it reoccurs on Talk:Central processing unit. Cheers! Said: Rursus ☻ 10:01, 9 June 2008 (UTC)
I've added some clarification to the embedded design section. The most significant change was the statement that embedded devices have a lifetime of several years whilst general-purpose processors "rarely stay in production for more than two years due to the rapid pace of progress". This implied that embedded processors do not have a rapid pace of progress, and this isn't the case. Some embedded processors do remain in use for several years, but this is better explained by the fact that many embedded applications have static requirements, and the cost of replacing the processor in a design is prohibitively high compared to the benefits.
how many people does it take to make a CPU?
I think this article about "CPU design" should answer the question "how many people does it take to design a CPU?". The article says "Assuming that 100 engineers are needed to design a CPU and the project takes 4 years." but gives no references for those numbers.
I posted some information on how many people it actually did take to make a few famous CPUs. To meet Wikipedia:Verifiability, I added references to back up the numbers I posted. But I put that information in the wrong section of the article -- oops!
That information was deleted. I succumbed to temptation and reverted that edit, moving those references to a different (still not quite correct!) section of the article. Some, but not all of that information was again deleted.
- No, the article should say how many people it takes to design a CPU. I removed some of the information because they did not belong in the sections where they were presented. Ideally, the article should discuss how the resources required for designing CPUs in each market (high-end, embedded, etc.) has evolved. In regards to the unreferenced section about high-end processor economics, I have added an unsourced tag. Rilak (talk) 05:11, 8 March 2009 (UTC)
- Not that I am aware of. It's not too flattering nor comforting to your customers when the next generation development becomes too expensive to be affordable. Companies like Intel will bring these points up in private when spreading FUD on their competition, but this reality is almost never discussed in public. Dyl (talk) 23:45, 8 March 2009 (UTC)
- The research sounds rather time-intensive... I think I will pass. If this helps, I do remember an article discussing the closure of an Intel Corp. design centre somewhere in ~2005? If I remember the details right, they were doing a further development of an existing design and had some 800 people, but I don't think they were all engineers. Rilak (talk) 03:54, 9 March 2009 (UTC)
- I don't see how that section or manpower statistics in the embedded section is relevant in any way. Those school projects aren't much more than a programming class requirement of writing a simple draw program - what you can achieve in a few hours in a lab, not the hundreds of man-months needed to produce a sellable product. None of these school projects are of the scale of any current-day CPU that you would buy. Dyl (talk) 07:27, 26 March 2009 (UTC)
I think it was added to show that a CPU can be designed and implemented with very little resources. Perhaps it should be made more clear that those CPUs are in no way in the same boat as commercial designs. I don't think that having a small section detailing the other end of CPU design can be a bad thing. It would not be a good thing if someone read this article and goes away thinking that CPUs can only be designed by five hundred people over five years, would it? Rilak (talk) 05:27, 27 March 2009 (UTC)
- I'm more worried that uninformed readers will think any CPU they would currently buy could be designed by two students. Also, for most of these classes, the project is to design just a portion of a CPU, eg. a simple integer ALU. Again, it's like having the Microsoft office or Firefox article saying that computer science students can write a draw program. What's the point? It would be more useful to post the team sizes of embedded CPU teams. Dyl (talk) 07:58, 28 March 2009 (UTC)
- I think this article about "CPU design" should answer the question "how many people does it take to design a CPU?".
- I agree that there are many classes where students design "just a portion of a CPU".
- However, there are some classes where students have designed and built various complete, although simple, CPUs -- not merely "design just a portion".
- You might argue that it is merely my opinion that those student-designed-and-built CPUs are "relevant" to CPU design or "in the same boat as a real CPU". You may be surprised at what our WP:YESPOV policy says about such opinions: The elimination of article content cannot be justified under this policy on the grounds that it is "POV".
- I agree that it would be useful to post the team sizes of embedded CPU teams. But I already did that.
- Since Wikipedia is not paper (WP:NOTPAPER), I think there is room in Wikipedia to describe both amazingly complex high-end commercial CPUs, and simple-but-complete low-end CPUs -- just as there is room in the bridge article to mention both amazingly complex and expensive high-end bridges, and simple rope bridges. --126.96.36.199 (talk) 05:15, 4 May 2009 (UTC)
This article is bad. Its so bad, that it would take me too long, to explain. There is nearly nothing which can be seen as good or sufficient. An expert needs hours; i do not invest them. Tagremover (talk) 16:07, 20 March 2012 (UTC) Structure improved. Tagremover (talk) 16:45, 20 March 2012 (UTC)
permission to use an instruction set
I see -- in Talk:ARM_Holdings#"Architectural_License"; SAS Institute Inc. v World Programming Ltd; Oracle v. Google; etc. -- that at least some people seem to think that "buying permission to use [an] instruction set" is a normal and common practice.
I was under the impression that no one needs permission to use an instruction set or any other programming language. (Perhaps ARM holdings actually sells detailed test suite torture tests and other validation tools and engineering technical support for their instruction sets, and someone oversimplifies this to "buying an instruction set", which is then misinterpreted as "buying permission to use an instruction set"?). Am I interpreting Oracle v. Google and SAS Institute Inc. v World Programming Ltd incorrectly? (Is an instruction set something that can be copyrighted? patented? mask work protected? trademarked? What parts of a processor design fall into the various intellectual property categories?)
While I am very happy that this article focuses on technical information, I wish someone who understands the business and legal issues -- i.e., someone who is not me -- to say a few words in this article about how one might buy or sell an instruction set -- or whatever it is that Qualcomm bought from ARM Holdings; Microchip Technology bought from MIPS Technologies, etc. --DavidCary (talk) 05:45, 23 July 2014 (UTC)
- At least some aspects of an instruction set appear to be patentable, as Lexra found to their annoyance. Platform Solutions, Inc. had similar issues courtesy of patent 5,595,709, patent 5,825,679, patent 5,953,520, patent 5,987,495, and patent 6,801,993. I don't know what patents ARM holds, if any, that one would need to license in order to implement an ARM instruction set architecture, nor what patents Intel has on pre-x86-64 x86 and AMD has on x86-64 that required cross-licensing. It appears that Intel and HP have patented a number of aspects of the Itanium architecture.
- And, for what it's worth, both ARM Holdings and its architecture licensees appear to think that buying permission to implement the ARM instruction set themselves isn't a weird and exotic practice. Most ARM licensees license ARM's implementations, so maybe it's not normal or common, but it's certainly not something so exotic as to be dismissed as lunatic. — Preceding unsigned comment added by Guy Harris (talk • contribs) 9:37, 23 July 2014 (UTC)
- I'm not denying the fact that people who make ARM-compatible chips pay bunch of money to ARM Holdings, and that such payments are a common practice -- even for people who re-implement the ARM instruction set "from scratch" with clean room design.
- I'm just trying to reconcile that fact with Oracle v. Google and SAS Institute Inc. v World Programming Ltd which seem to say that programming languages as a whole cannot be patented.
- One way to reconcile these facts is to say that "buying permission to use [an] instruction set" is a simplification, and it would be more accurate for this article to say something like Some features of some instruction sets are patented, and manufacturers are legally required to license (buy permission to use) those patented ideas before selling processors that use those ideas. Often the name of the instruction set is trademarked, and manufacturers license (buy permission to use) that name to use in advertisements for their chip.".
- Another way to reconcile these facts is to say that Oracle v. Google and SAS Institute Inc. v World Programming Ltd don't apply to instruction sets hard-wired into physical CPU chips, and "people are legally required to buy permission to use an instruction set before fabricating and selling chips that use that instruction set".
- I honestly don't know. I wish this article said something one way or the other.
- Either way, my understanding is that manufacturers, in addition to "buying permission", also buy test suites and other things, not because they are legally required to, but because it's cheaper than developing their own independent test suites and other things.
- I wish this article listed all of the things manufacturers typically buy from ARM Holdings and other groups of people that design processors. --DavidCary (talk) 14:23, 30 August 2014 (UTC)
- If wishes were horses, beggars would ride. Expressing a wish for something gets you nothing unless somebody has the resources to fulfill the wish.
- The product described in this document is subject to continuous developments and improvements. All particulars of the product and its use contained in this document are given by ARM in good faith.
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- 3.THE ARM ARCHITECTURE REFERENCE MANUAL IS PROVIDED "AS IS" WITH NO WARRANTIES EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO ANY WARRANTY OF SATISFACTORY QUALITY, NONINFRINGEMENT OR FITNESS FOR A PARTICULAR PURPOSE.
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- but they don't indicate what "rights" to "[develop] or [have developed]] microprocessor cores or models thereof which are compatible in whole or part with either or both the instructions or programmer's models described in this ARM Architecture Reference" are involved, what laws require those rights to be explicitly granted by ARM, or who will enforce those rights. Perhaps their only claim that you need them to grant you such a "right" comes from patents they have on features of the ARM architecture, just as, for example. MIPS has patents such as U.S. Patent 4,814,976 on features of their architecture, or that they have a trademark on "ARM" and that you can't describe your processor as implementing the "ARM architecture" unless ARM grants you a trademark license to do so. Guy Harris (talk) 04:25, 31 August 2014 (UTC)