Talk:Commodore PET

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There was a 3rd party add-on board called the "visible memory." It added 8K to the PET's memory and remapped the PET's own monitor to use it as a frame buffer. So instead of 40x25 8x8 characters, you had 320x200 addressable dots that could each be on or off. I know it existed because I owned one, although I can't find any reference to it on the modern Internet. Perhaps it went by another name as well? (talk) 21:24, 24 August 2015 (UTC)

Update: Found a link [[1]] (talk) 01:13, 25 August 2015 (UTC)


it would be really great to see a timeline of when each model was first available and sold, but i haven't been able to find anything that does that and am not comfortable editing wiki right now. help? (talk) 19:49, 26 November 2010 (UTC)

Transfer rate to tape cassette[edit]

The article indicates an effective transfer rate to the tape cassette of 750 baud. But I recall that it took a little under three minutes to write out 8 kB, which would be 400–500 baud. (talk) 13:37, 17 June 2011 (UTC)

"Not every baud is a bit". Not every bit sent to the cassette deck represents a bit in memory, some of it is overhead. I don't know the details of the PET tape format but other tape formats have checksums and may even encode one binary byte as two ASCII characters. --Wtshymanski (talk) 13:52, 17 June 2011 (UTC)
The PET tape format was a bespoke one and was as close as you could get to a 'digital' recording on an analogue tape (which is why the tapes could not be copied using two standard cassette machines). The PET tape format recorded the data twice on the tape at an effective average of 1500 baud. However the length of a '1' written to the tape was different to the length of a '0', thus the actual data rate varied with what was actually written. As you note, there is a certain amount of 'housekeeping' data written to the tape as well, largely identifying the repeated blocks of data. A real world data rate of 400-500 bits per second would be in the right ball park. (talk) 16:19, 22 September 2011 (UTC)

Questionable Claim[edit]

The article claims:

"Internally a newer motherboard was used, along with an upgrade from static RAM to dynamic RAM"

It is not possible to interface dynamic RAM to the 6502 processor because the 6502 has no provision for tri-stating its data bus - necessary to perform the refresh cycles. It is not even possible to provide external data bus tri-stating because the bus cycle of the 6502 is such that it has no available time interval in which to perform it. AFAIAA, there was no dynamic RAM version of the PET ever sold. In fact there was no dynamic RAM version of any 6502 based computer for these very reasons. Commodore (and MOS) had to produce the upgraded 6510 processor before dynamic RAM could be used. (talk) 16:13, 22 September 2011 (UTC)

Absolutely correct. In fact back in 1984(ish), I attempted to design a 32 Kilobyte RAM card using 4116 dynamic RAM chips. The idea was that the 6502 was plugged into the card and card plugged into the original processor socket. This was necessary to keep the data bus leads as short as possible. It was not easy designing the card and indeed there were several iterations before I got the prototype working. Well, not quite. The only niggle I was left with was that the processor wouldn't reset using the computer's original power on reset circuit, so my card had to incorporate one of its own. The prototype then worked flawlessly, but when I offered the design to a company to produce, the production cards were temperamental and erratic as the tight tolerances on the timing of the data bus isolation kept clashing with the processor wanting to use the bus. Had the production cards worked, it would have been useable in the PET as the memory mapping was all jumper selectable. In the event, I probabably had the only UK101 (another 6502 based computer), and possibly even the only 6502 based computer with 32 MB of dynamic RAM on the planet. DieSwartzPunkt (talk) 16:44, 22 September 2011 (UTC)
I can further add that even the Commodore VIC-20 design was forced to use a modest amount of static RAM (rather than a greater amount of vastly cheaper dynamic RAM) simply because it retained the 6502 processor (the 6510 was not yet available). Another cost problem was that the static RAM of the day was very power hungry and even the 3 kilobytes worth in the VIC20 required around 1.5 Amps at 5 Volts. The 6510 was available to the C64 and incorporating 64 KB of dynamic RAM was easily possible - and with a sensible sized power supply. DieSwartzPunkt (talk) 17:02, 22 September 2011 (UTC)
Now you mention it, I can recall a dynamic RAM upgrade card for various computers being advertised in various magazines by a company called (if memory serves) Audio Computers (??) possibly based in East Anglia somewhere. I seem to recall that the PET was one of the options (my recollection is that there were different card versions for different computers). They weren't advertised for long as I recall. Were these the cards you designed? (talk) 12:03, 23 September 2011 (UTC)
Hold on a minute. Didn't the Apple II and various Atari machines have dynamic RAM? Seems a bit far fetched to claim you can't interface dynamic RAM to a 6502 - you don't need to tri-state anything on the processor to refresh memory. --Wtshymanski (talk) 13:32, 23 September 2011 (UTC)
You do have to tri-state (or at least isolate) the buses otherwise you risk a bus crash if the refresh cycle overlaps a processor bus access. Almost every other processor can either tri-state the busses, or at least has enough slack in the bus timing to allow external logic to do so. I don't have details for any Atari, but the Apple II used a very cunning trick to allow the video circuitry to access the same memory which, fortuitously, also allowed the use of dynamic RAM.
The firmware of the Apple II was written in such a way that the 6502 only accessed the data bus half as frequently as it otherwise would have done so. This was partly a product of the way the firmware was written, but also by utilising (IIRC) interupts to create the gaps in the bus access particularly when running machine code applications that were not specifically written to create such gaps. This was originally done to allow the video circuitry to access the memory when the processor wasn't using the busses. As a knock on benefit, the video circuit's predictable and regular access also refreshed the DRAM chips rendering separate refresh logic unnecessary.
This wasn't actually a very technically elegant way of designing a circuit as the 6502 had to be isolated from the memory using resistors to prevent the video circuitry from forcing the 6502's outputs to the opposite state. Further, it also meant that the 6502 couldn't free run any machine code program. It also meant that software ran more slowly than it otherwise would do so. Based purely on specs and performance the Apple II was never going to set the world on fire, but the appearance of the VisiCalc spreadsheet software changed all that and the Apple II became a best seller practically overnight. DieSwartzPunkt (talk) 16:31, 23 September 2011 (UTC)
It's going on 30 years since I bought a KIM-1 - I'll have to see if I can find any of my old 6502 hardware manuals. But surely there were 6502 computers with dynamic RAM. --Wtshymanski (talk) 18:07, 23 September 2011 (UTC)
Not officially, though it would seem from the above that it was possible with a bit of clever circuit design. You have to remember that the 6502 was designed as a low cost no frills alternative to what was available at the time. The 6501 (it's predecessor but electrically almost identical) was designed as a $25 part when its rivals (notably the Motorola 6800 and the Intel 8080) cost around $300 each. Luxuries like tri statable data buses were omitted, but as dynamic RAM didn't yet exist, this was not really seen as a problem. The only (official) way of interfacing dynamic RAM to such a device is to provide external logic to temporarily isolate the processor from the memory while the refresh cycle executes. The 6502 unfortunately, didn't have a gap in its memory access cycle that was long enough to allow a reliable refresh to take place. If it was tried and the processor then initiated a memory access, while the memory was disconnected, it was an internal quirk of the processor design that the data bus picked up the high byte of the address bus on a read cycle. If a write cycle was being attempted the data would, of course, be lost. (talk) 11:54, 24 September 2011 (UTC)
The KIM hardware manual is still buried in the garage, but in a September 1985 BYTE article (page 247-248 "The Quarter Megabyte Atari 800XL", by Claus Buchholz) there's a discussion on converting an Atari 800XL from 4164 to 41256 DRAM to get a quarter-megabyte of memory into it; both dynamic types. The article says the 800XL spent 8% of its time refreshing RAM, and that the processor was halted when the video needed to do DMA. The 800XL came along only 2 years later than the PET. Whatever the reasons the PET had static RAM, it wasn't because dynamic RAM couldn't be interfaced to a 6502. --Wtshymanski (talk) 16:44, 24 September 2011 (UTC)
The clue here is in your reply. Halting the CPU clock was another design trick to allow video access to a simple memory mapped video RAM. If a trick wasn't used then it was necessary to design a memory arrangement that allowed the video circuitry to access the RAM without interfering with the CPU's normal memory access. While the CPU clock is halted, it is perfectly possible to have suitable logic refresh dynamic RAM (although, as already noted, the video circuitry's access would achieve the same result). It is still necessary to isolate the RAM from the CPU while this is taking place otherwise it is likely that the CPU's output logic will be damaged by the relativlely large currents that can flow due to the bus crash. Although logic should be used, some manufacturers prefered to use resistors to limit this current rather than isolate it properly. As in the case of the Apple II (wasn't it actually 'Apple ]['?) this trick slows down the execution of the code (generally halving it but some manufacturers eventually figured out that it wasn't necessary to stop the CPU clock while the video controller wasn't accessing the memory - e.g. during line and frame rescan intervals). It was sometime later that VRAM memory chips appeared which allowed simultaneous access from two independant bus systems and solved that particular problem - but by this time newer processors were in use such as the Z80 which could be interfaced with DRAM without any extra logic. The fact remains that without artificially creating gaps in the 6502's bus cycles and providing external tri-stating, dynamic RAM cannot be interfaced. I grant that it can be interfaced with some sneaky design tricks, but only at the expense of execution speed which isn't really the objective.
By way of practical example: here in the UK, one of the biggest selling 6502 based computers was the BBC micro. It came in 16kB and 32kB variants, and the use of the then ubiquitous 4116 DRAM chips for the memory would have been ideal. But Acorn (the manufacturer) couldn't figure out a way to interface the DRAM chips without affecting the execution speed of the CPU (and thus giving the machine an inferior performance to others on the market - and by this time it was trying to compete with 6809 and Z80 based systems). The BBC consequently featured static RAM chips (at extra cost!) which caused overheating of the originally supplied linear power supply. This was quickly replaced with a switch mode model which easily handled the large current demanded of the RAM. Jack Tramiel (Commodore's then boss) was always wanting his computers to run faster and faster (and he kept a very close eye on the reviews of his products), so slowing down the CPU to create gaps in the bus cycles for dynamic RAM was unlikely to endear his designers to him. (talk) 15:26, 25 September 2011 (UTC)
──────────────────────────────────────────────────────────────────────────────────────────────────── If all this could be referenced, it would be worth including in...some article somewhere. Getting back to the point, most 6502 machines used dynamic RAM and it didn't seem to bother consumers that a processor capable of 1 MHz clock was actually being run at 0.88 MHz to save a 59 cent crystal. The megahertz race didn't really get started till the IBM AT clones came along. --Wtshymanski (talk) 16:00, 25 September 2011 (UTC)
I cannot disagree with that observation. I'm not sure where one would dig up the necessary citations, and where to incorporate it (possibly the 6502 article itself?). One of the biggest problems with Wikipedia is finding suitable cites for obsolete technology. I personally would favour some sort of tag that identifies such articles and allows the content to be left to peer review (there are already several articles where this is what has happened). Unfortunately, Wikipedians with greater clout than myself disagree with me. The position is made worse because there is at least one Wikipedia editor whose sole editing contribution to Wikpedia is to trawl through articles for any unsourced content - and delete it no matter how obvious it is. Often 50 or 60 deletions at a sitting! (talk) 16:18, 25 September 2011 (UTC)
It wasn't Audio Computers. But having said that, I believe the company I used (can't remember their name after 25+ years) did have a product share agreement with Audio Computers. It is also entirely possible that they subcontracted the production to them as I doubt that they would be able to make the boards themselves. DieSwartzPunkt (talk) 16:55, 23 September 2011 (UTC)

European PETs[edit]

The article claims that these machines were not sold as 'PET' in Europe as Philips already used the name PET. These machines most certainly were sold in the UK (which is part of Europe) as the Commodore PET. In fact virtually every computer museum here has at least one example. Philips had a considerable presence in the UK, but there doesn't seem to have been a problem? (talk) 11:56, 23 September 2011 (UTC)

The September 1985 BYTE contains a column by Dick Pountain ( Seventh Anniversary of Microcomputing, page 385) which says, talking about the period around 1978: At over £1000, the Apple II was so expensive that the cheaper, all-in-one PET became the dominant machine in Britain, Germany and Scandinavia, keeping Commodore comfortably afloat during those lean years when Apple was cleaning up in the U.S. --Wtshymanski (talk) 19:17, 25 September 2011 (UTC)
Could that be a suitable cite to refute the above claim? (talk) 11:06, 26 September 2011 (UTC)
I've removed the dubious bit. It would probably be hard to sell a computer called "PET" in the homeland of Joseph Pujol. --Wtshymanski (talk) 13:30, 26 September 2011 (UTC)
See also the VIC 20 article; Commodore seems to sometimes bite the wax tadpole when choosing brand names. --Wtshymanski (talk) 14:18, 26 September 2011 (UTC)
Ah yes, the hazards of language. It's always problematic selling products internationally. Whatever your peddling, it turns out to be a rude word in one language or another! (talk) 14:37, 26 September 2011 (UTC)

SuperPET Sold in US[edit]

The article claims that the SP900 (SuperPET) was sold only in Europe.

the SP9000, known as the SuperPET or MicroMainframe. This machine (only sold in Europe

I worked for "The Computer Shop of Abilene" of Abilene, Texas, and about 1981 we offered the SuperPET for sale along with the 4000 and 8000 series of CBMs. — Preceding unsigned comment added by (talk) 14:34, 18 July 2012 (UTC)