Talk:Diode–transistor logic

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Misleading statement in operation section?[edit]

Two diodes in series are commonly used to lower the voltage and prevent any base current when one or more inputs are at low logic level.

Two diodes in series double the voltage, not lower it. It's not clear at all to me from this description how 2 diodes could improve the turnoff of the transistor base (one in the transistor emitter might). Gareth8118 (talk) 12:54, 6 March 2008 (UTC)

I suspect that was meant to describe an added diode as shown here. Maybe you can fix it. Dicklyon (talk) 15:57, 6 March 2008 (UTC)

Simplified schematic[edit]

It should be emphisized that the diagram is a "Simplified schematic" and does not actually work. Someone should be able to find a "published" schematic that actually works. I can only provide a design similar to those used in early computer designs. I would hate to think that some future engineer would try to build the circuit as shown and find that he wasted his time. UPCMaker (talk) 22:59, 3 April 2008 (UTC)

I replaced it with a correct one; not quite as simple, but shows a resistor configuration that will make it work. From the GE Transistor Manual (3rd through 6th editions). Dicklyon (talk) 04:53, 4 April 2008 (UTC)

This is great! You might add a capacitor across R3 which was common for DTL to reduce saturation delay. That was one of the main reasons DTL was faster than RTL. TTL could not allow a speed up capacitor because it would need one on each input resistor and that would have coupled noise from input to input. UPCMaker (talk) 00:10, 5 April 2008 (UTC)

Sorry about my comments added to the switching circuits. I just wish someone would fix all the errors and miss statements that I guess come from bad publications. We had the DTL schematic fixed but it went back to the bad one. If someone that was doing the work can't comment then can't someone try to research these circuits.UPCMaker —Preceding unsigned comment added by (talk) 12:12, 25 October 2009 (UTC) Italic text —Preceding unsigned comment added by (talk) 08:13, 18 November 2009 (UTC)


I propose creating an article for CTDL for reasons of consistency. Information about CTDL is already part of this article under the section called "CTDL". I looked at and I noticed that most subclasses of circuits are linked to specific articles.

Aside from this, I would like to understand why DTL became CTDL and not CDTL.

ICE77 (talk) 01:42, 19 February 2011 (UTC)

Right now it's two lines in this article - myself, I wouldn't bother spinning it out to its own article unless there was a whole lot more about it. How notable was CTDL? If it had inductors in it, it almost certainly never made it to the monolithic integrated circuit stage. --Wtshymanski (talk) 03:24, 19 February 2011 (UTC)

If that's the case, then DCTL should not be a separate article. It should follow under RTL in a section called "DCTL". Is there any suggestion about CTDL and CDTL? Also, what would be the typical values for R1, R2, R3 and R4?

ICE77 (talk) 04:08, 19 February 2011 (UTC)

Why are you asking here? Aren't you the guy who was going to write it up? What sources do you have? Dicklyon (talk) 06:17, 19 February 2011 (UTC)

Dicklyon, I never said I was going to write the article myself. I just proposed the idea of making it.

ICE77 (talk) 03:38, 20 February 2011 (UTC)

CTDL is not distinguished by speed up capacitors or peaking inductors.
Looking at the 1401 prints, the "Complemented" moniker is a naming convention. What the 1401 calls complemented "AND" gate is what we'd call a NAND gate. See page 83, 'CTDL - TWO WAY "AND" NPN'. Except there is a twist with the logic levels. CTDL has two sets of logic level definitions: one for positive logic and the other for negative logic. There are both NPN (-6 to +6 supply, in+ out- logic) and PNP (-12 to 0 supply, in- out+ logic) flavors for gates. See page 84, 'CTDL - TWO WAY "AND" PNP'. The input logic levels are different than the output logic levels. That avoids R1 and R3 (and the whole noise immunity divider). CTDL does not "add a capacitor across R3" because R3 does not exist in the typical gate.
There's another game of complementary going on here - the designers expected to alternate NPN and PNP gates to consistently . There are level translators. See page 98. These level translators use a speed up capacitor across R3.
The basic AND gates appear to minimize time to come out of saturation with high level drive.
(The designers were also using current mode (page 96) and wired-or emitter followers (page 97). There are also other merged modules.)
Adding a peaking inductor to the load speeds things up, but that does not change that the basic logic is DTL. Peaking inductors were a common way to speed up transistors; Tektronix did it a lot in their amplifiers; I think it was called a T-coil.
CTDL has plenty of engineering insight, but it is not worthy of a separate article yet. DEC had something like FLIP modules, and it would be interesting to know if they used two different logic levels.
Glrx (talk) 17:26, 19 February 2011 (UTC)

Is it true?[edit]

"In an integrated circuit version of the gate, two diodes replace R3 to prevent any base current when one or more inputs are at low logic level. Also R4 is removed(?), and the integrated circuit runs off a single power supply voltage." Circuit dreamer (talk, contribs, email) 10:39, 17 April 2011 (UTC)

The cited web page does not support removing R4. The Computer History Museum has some interesting docs and refs that suggest the Signetics SE100 line had poor noise immunity. Perhaps the SE100 line deleted R4 and Fairchild's μL930 line used the resistor. Some old datasheets might answer the question. To me, R4 is needed to set a decent drop on the two series resistors and guarantee cutoff. Some WP:RS should be used to justify a statement about deleting R4. (See also for family overview and bib; stating SE100 DTL had poor noise immunity; sensitive to clock waveform.) Glrx (talk) 17:19, 17 April 2011 (UTC)
We are talking about the circuit with two series connected base diodes (e.g., [1]), aren't we? The problem of this solution is the absence of a return path for discharging the base. So, I suppose that R4 is not simply removed but it is connected to ground (as it is shown in [2]). Circuit dreamer (talk, contribs, email) 20:00, 17 April 2011 (UTC)
Sorry, I see you have corrected it. Circuit dreamer (talk, contribs, email) 20:09, 17 April 2011 (UTC)

Speedup capacitor[edit]

Where are the sources for the speedup capacitor? It seems to me that with the diodes it can't possibly help in both directions; if it speeds up stored charge removal, it probably doesn't help the turnon much if at all (in the circuit shown); certainly it doesn't act like a differentiator or "force the base current" in this case. Dicklyon (talk) 15:51, 23 April 2011 (UTC)

Horowitz&Hill have said on page 908, "A small "speedup" capacitor across the base driving resistor can reduce storage time by providing a pulse of current to remove base charge at turn-off, and in addition it increases base drive current during turn-on transitions."
Diodes (as connected) do not impede charging and discharging of the capacitor. The capacitor acts as a differentiator since we apply voltage across it as an input and take the current through it as an output. I suggest to scrutinize the circuit operation during the two states. It would be well if we know the exact values of the elements (resistances and voltages). Circuit dreamer (talk, contribs, email) 17:50, 23 April 2011 (UTC)
I added two refs. Mot HS STH is silent about helping with turn on. I included its qualifying comment about low Z input drive because that can be true for the gate shown in this article for turn off. For turn on, the input diodes are off (ie, hi-Z drive), so the diode gate pull up resistor is the driving Z. I think that explains Dicklyon's reservation about helping both ways. I think H&H overstate the turn on benefit for logic, but the comment may be appropriate for switchmode drive. H&H are addressing storage time in the abstract and not specifically for DTL. Also, if the capacitor is too big, it will saturate the transistor. Glrx (talk) 19:48, 23 April 2011 (UTC)
Nothing in H&H connects this idea to DTL. Does the Moto book? Dicklyon (talk) 04:47, 24 April 2011 (UTC)
Right. While I can't provide a reference, common sense dictates there is no way of adding a capacitor to the internal circuitry of a DTL package. No description of logic circuits I have read mention the use of integrated capacitors. Speed-up capacitors have been used in discrete logic circuits. Paul Gray's book pg 303-306 and 821-841 has a good explanation of this using charge control models. For low drive switches it is used to increase the turn-on time and for saturated switches the charge on the capacitor equals the extra charge stored in the base in the on state. I don't think speedup caps to be mentioned here. Zen-in (talk) 16:27, 24 April 2011 (UTC)
H&H discuss improving the speed of saturated switches. The third stage of DTL is a saturated switch, so I believe the reference is appropriate. Similar argument for Moto HS STH. The initial ref to Baker clamp and diode methods is section on saturated switches. Much later section 7-1-4 discusses minimizing inverter switching time for RTL stage (which is similar to DTL inverter stage).
I don't understand Zen-in. Integrated circuit DTL did not use speed up capacitors; fine. Discrete logic used speedup capacitors. Why shouldn't speed up caps be mentioned? The article is not restricted to integrated circuit implementations.
Glrx (talk) 00:23, 26 April 2011 (UTC)

Every IBM DTL logic circuit implemented with discrete components used a speed up capacitor. It definitely decreased the saturation delay and also improved the turn-on speed and to some extent transition speeds. I designed most of IBM’s DTL discrete circuits from 1958 to about 1960. RTL could not use a speed up capacitor since they would have caused cross coupling of the inputs. That and the inefficiency of RTL resulted in very poor speeds. W. G. Crouse (Sorry, I came back.) — Preceding unsigned comment added by UPCMaker (talkcontribs) 21:36, 24 April 2012 (UTC)

Implementations 1401[edit]

The article in Implementations referring to the IBM 1401 claims it used DTL but avoided the R3 and R4 level shifter by using alternate NPN and PNP circuits. IBM never had DTL or any voltage mode logic circuits that required alternate level shifted circuits. All their voltage mode logic circuits provided compatible input and output levels. I believe the author is confused with IBM’s Drift Transistor Current Mode logic circuits invented by Hannon Yourke. In the DTL circuit R4 and V- were needed due to the use of Germanium Alloy Transistors which at high temperatures has very low base-emitter drops and very high collector-base leakage. I might add that after their very earliest transistor circuit family their voltage mode logic circuits used primarily PNP transistors and their DTL family achieved circuit delays near 100nsec. Yourke’s current switching family achieved 20nsec delays with Drift Transistors that cost $20 each. All these families used germanium transistors, many where hand made. The DTL circuits all used capacitors around R3 for increased speed for both saturation and cutoff delays. The extra power supplies for all circuit families were not a concern since the cost of transistors greatly out weighed the cost of power supplies. Remember this was 1955 to1960. Integrated circuits with cheap and matched silicon transistors were not quite available. Discrete silicon transistors were very expensive and unbelievably slow. W.G.Crouse is back. — Preceding unsigned comment added by UPCMaker (talkcontribs) 21:21, 24 April 2012 (UTC)

See #CTDL discussion above. You can also look at the prints, and they have nice tables for input/output levels. For example, a CTDL 3-WAY "AND" PNP EXTENDABLE INPUTS used in the 1401 has input voltages ranging from -6.24 to +6.24 and output voltage of -12.5 to 0.26; speed is 100 to 800 nS. There's no R3 or R4, so there isn't a capacitor to place around them. The logic levels are "compatible" if PNP and NPN stages alternate, but NPN stages cannot drive NPN stages because the logic levels are different. Consequently, there is also a level translator in the family. Leakage/matching is not an issue because input/base drive is bipolar: either it's push in or suck out; the inputs provide a leakage bleed path when needed. I still have some of the diodes and 034 transistors used in the 1401. IIRC, Baker said the 1956 Si cost was $200/ea. Glrx (talk) 22:55, 24 April 2012 (UTC)
I believe I worked on every IBM logic family packaged on SMS cards. I never heard of CTDL. The inductors and complementery circuits etc. sound like the Current Mode family. I tried the link for the 1401 logic but it didn't work. I would like to see the schematic for CTDL. I really think something is wrong here.UPCMaker — Preceding unsigned comment added by (talk) 00:48, 25 April 2012 (UTC)
OK, I found the IBM CTDL schematics and I am proud to say I never worked on or knew about them. The 1401 did use Drift Current Mode logic but if they used CTDL it must have been with the idea they would save money but why they chose such a strange circuit is beyond me. It would have had all the disadvantages of DTL and Current Mode without any of the advantages. They couldn’t have just picked up our DTL directly because it required +12Volts but that would have been easy to fix. I guess you can just ignore my comments above. .UPCMaker — Preceding unsigned comment added by (talk) 12:02, 25 April 2012 (UTC)
It sounds like the 1401 used CTDL for the slower operations and some STDL for faster ones. The CTDL schematics have both CTDL and current mode outputs. I haven't had time to digest the S- logic. CTDL has some small advantages over conventional DTL; the only disadvantage I see is the two logic level flavors (T and U). The prints have detailed graphs of switching speeds, so it is clear that IBM was serious about performance. Glrx (talk) 15:56, 25 April 2012 (UTC)

Two Worlds[edit]

I have been away from Wikipedia Logic Circuits for a while. When I came back a few days ago I thought I had landed on another planet. Then I realized I was just straddling between two worlds, the old world and the new world. The rules of the old world just don’t seem to make sense for the rules of the new world and visa versa. The two worlds are Discrete Transistor Logic Design and Integrated Circuit Transistor Logic Design. If you were born after 1940 you probably missed the old world and many things from that era just don’t make sense.

Integrated Circuit Transistor Logic Design is probably well known by most today but let me state the rules. Transistors are small cheap and plentiful. Diodes are nearly as desirable but often replaced by transistors since they are maybe just a little more desirable. Resistors are OK but they are less desirable than transistors and they have somewhat poor tolerances. Capacitors should be avoided if at all possible as they are very difficult to provide. Inductors are absolutely not allowed except off chip. Also the transistors are nice NPN silicon devices with high base emitter drops and nearly zero leakage currents. And best of all the transistors on a single chip are well matched. PNP transistors are possible but they are large, have poor performance and are best not used if at all possible.

With these rules why would anyone ever build RTL and to a lesser extent DTL since transistors are better. You definitely would not add a capacitor. The Three Transistor “Dot Or” thing might not be too bad but is that really RTL and why would you ever want to do that. If that three transistor logic function is RTL just because it has resistors then shouldn’t DTL be called RDTL since it has resistors doing similar functions? Maybe that circuit is just TL since all transistors are performing the logic function directly. Then there is the CML invented by Rourke. Why would anyone want all those power supplies and complementary signal levels when a few extra transistors can shift the levels like ECL. High matched base emitter drops do this so well with only one power supply and all input output levels are compatible. TTL is ideal and ECL is good if you need the speed. Both use only transistors and a few resistors. Life is good.

Discrete Transistor Logic Design was the only way to build computers or logic functions prior to about 1961 or 62. Well, not counting vacuum tubes and relays but why would anyone ever use those when transistors are much better? The transistors were discrete germanium, often hand made. They cost $5 to $20 with a few exceptions that were $1 but not suitable for logic circuits or much of anything except hobbies. Silicon transistors and diodes were very expensive and unbelievably slow. Logic diodes were germanium and cost twenty-five cents for good ones. You could reduce that price to eleven cents if you could work with a spec that would use most of the fall out of all the low current germanium diode lines in the world but not exceed all the fall out available. Resistors and small capacitors cost less than five cents for 5% tolerances. Germanium transistors were best made as PNP but NPN was possible and just as available in hand made alloy devices including drift transistors. Planar transistors became available in 1959 and these provided better performance and speed but were less likely to be found as NPNs. All germanium discrete transistors have low base emitter drops that can approach zero at high temperatures. The base-emitter drop is not usable for level shifting. The leakage current at high temperatures was enough to turn the transistor on. To insure an off condition it might be necessary to reverse the base emitter voltage by a tenth of a volt and provide 100 micro amps of leakage current.

Under these rules transistors were essential but should be used sparingly due to their cost. One transistor per logic gate was preferred if possible. Resistors and small capacitors were fine. Diodes were OK but less desirable than resistors due to cost.

DTL was the first transistor logic circuit I ever saw and possibly the first used in IBM. In 1958 IBM shipped a one of a kind “Largest Transistorized Computer in the World”. It had 20,000 NPN and PNP transistors most of which were used one transistor per circuit in a DTL configuration. The DTL circuits were implemented in both PNP and NPN but all signals were compatible zero to minus five volts. The PNPs were Plus OR Inverts. The NPNs were Plus AND Inverts. OK, you could name them upside down also, Minus AI and Minus OI. The circuits ranged from simple inverters to eight inputs. All used speed up capacitors around R3 as shown in your DTL circuit. The object of the capacitor was to tune the impedance of R3 x C to match the complex impedance of the base input when saturated. This first family could handle a pulse width of 1 micro second minimum. The DTL circuit was taught in most transistor circuit design courses always with a speed up capacitor. A capacitor only cost five cents and increased the speed, both On and Off by, a very significant amount. I might mention that the design of R3 and R4 was not well understood. The two professors that taught transistor circuit design at MIT around 1960 proposed a design procedure that would not guarantee a reliable On condition. All discrete transistor circuit designs were achieved using the sum of currents in each node and calculated with a slide rule, calculators could not fit in a small room. IBM had a two transistor circuit they called a Trigger. It was an edge triggered flip flop like the D flip flop in ICs. It had a two transistor latch with two Harper Gates to provide the function of all those extra transistors in the D flip flop. Each Harper Gate required one each resistor, capacitor and diode. The capacitor provided the storage function required for a single stage counter or shift register. The D flip flop would not work in discretes because circuit delays could not be matched and who could afford all those transistors?

CML was my second logic family and the first where I did some circuit design. When IBM came out with their SMS card technology it included Rourke’s CML family for super high speed and RTL for low cost. RTL was cheap, very slow and inefficient. It could barely provide a three way logic input because of tolerances and for the same reason it could only drive three like circuits with its output. A logic circuit family must achieve at least a three way input and a three way output to be a practical family. If more inputs or outputs were needed it was necessary to add additional logic gates. It was barely a usable family and extremely slow. It had 3 micro second delays because it could not use a speed up capacitor. But it was minimum cost. In fact the poor fan-in and fan-out added additional cost that resulted in very little use of that family. A new DTL would crowd it out.

The star of the SMS era was Roarke’s CML, at least initially. All the rules were ignored for speed. It used drift transistors that were hand made alloy and cost $20 each. A three way logic gate used four transistors worth $80 total. It required five one percent resistors and two small inductors each of which cost nearly $1 plus four small five percent resistors that were cheap and prevented Common Collector Oscillation. The inductor was to increase the transient speed. Some circuits did not include the inductor because it was found it increased the noise sensitivity. With all this bad the circuit was ideal for speed. Not only did it not saturate but it did everything else to maximize speed. It had low impedance on the base and collector and high impedance on the emitter. This reduced the amplifying effect on the collector-base capacitance and reduced the time constants on all signals. It also reduced the signal voltage. It did everything that could make it fast. Other than cost the only thing that could be said that was bad was it had complementary signals that were not compatible. With the available components, there were no silicon transistors with high matched base-emitter drops and high speed, the only way to shift the output to the level of the input and still maintain speed was to use a circuit like its complement and this would double the delay. It made sense to use complementary circuits to provide the level conversions and also provide a logic function. What about all those power supplies? With $20 transistors it didn’t take long to pay for a few power supplies. Roarke must have done something right since his design was the basis for all high speed computers, extended with ECL, for the life of bi-polar transistor computers.

In 1958 new transistors were becoming available and I designed DTL circuits to test a number of them. I believe it was the Mesa transistor from TI that we settled on. B. O. Evans, IBMs future technology leader, created our new Circuit Tech department in the IBM Glendale Lab, near Endicott, NY, to design circuits in general but most importantly a new DTL family we called the NAND family, not an especially good name but since the RTL was called the NOR it seemed appropriate. Our family would also be packaged in SMS. I believe our NAND family later became the SDTDL family. The circuit looked similar to your DTL schematic except it used PNP transistors, had a speed up capacitor and also included a diode around the base-emitter to limit reverse bias to speed up turn-on. We provided fan-ins of up to eight and had a fan-out of ten or twelve. Delays and transient speeds were about 100 nano seconds.

At that time we were calling nano seconds milli micro seconds and pecofarads were micro micro Farads or Mickey Mics. The metric system had not quite reached our shores yet. This terminology was not just IBM; I learned it first in the army guided missile school.

I believe there was a question if R4 was needed. Germanium transistors at high temperatures required the base-emitter be reverse biased and its large leakage current provided to insure the Off condition. R4 and the power supply provided this, an extra power supply but essential to a reliable design. I might mention a circuit for a hobbyist might work without R3 and its power supply but not reliably especially at elevated temperatures. Many circuits published in amateur hand books show circuits that won’t work at elevated temperatures or for quantity production. Even component vendor handbooks sometimes had circuits that would not function as a reliable computer design. Design that could provide the reliability needed to insure 10,000 circuits would all work over full temperature and all the component tolerances was not understood by even college professors teaching new engineers. So much for published, hard copy references to verify valid information for Wikipedia. Maybe there should be some exceptions unless I just don’t know what I am talking about.

CTDL developed as a low speed alternative to CML. This logic family would probably never have developed except for its relationship to CML. The complementary NPN and PNP circuits with non compatible outputs make sense when related to CML but CML had good reason for complementary stages where as CTDL did not. Except for the non compatible complementary outputs it was a good design for DTL. CTDL does not include a speed up capacitor because there is no R3 or no resistor that needs to be bypassed. To the best of my knowledge CDTL was not used except with CML.

I might add in 1961 we started developing a low speed family that used selenium diodes with similar characteristics to silicon but cost less than one cent. The terminal development departments were begging for low cost and didn’t need speed. We could punch eighth inch discs from a sheet of selenium diode. GE assured us they could make reliable selenium diodes. They could do better than the three to five year life of selenium rectifiers but TV manufacturers liked the shorter life. We found we could make a DDTL circuit with two levels of diode logic feeding one alloy transistor and no R3 or speed up capacitor. We called the family SMALL for Selenium Matrix ALloy Logic. The alloy transistor proved to be too fast for the selenium diode recovery so we connected a selenium diode around the base-emitter to slow it down and give it the speed of a selenium transistor if there could be one. The two level logic was similar to the PLAs Programmable logic array that would come on the market many years later. Nearly any static logic function that yielded one output could be achieved with one transistor and a handful of cheap diodes. Several years after I left the project I learned the selenium diodes indeed were not reliable and were replaced by some cheap silicon diodes, probably not nearly one cent. I did see the family packaged on SMS cards.

I apologize for the length of this discussion but since I am not allowed to contribute to the Front Page, Articles, because IBM and any other competing company making computers in the Old World did not publish their secrets I cannot reference my information to hard copy documentation such as hobby handbooks. It seems this rule is mostly enforced in the transistor logic articles. I am just worried that all this information is about to be lost since many of my co workers have already transferred to that Great Circuit Tech Department In the Sky. Maybe it really wasn’t that important. It only launched the computer age.

After this has been read by a few of the powers that be it can be edited or deleted as they choose with my blessing. I probably should not have written it anyway. UPCMaker (talk) 13:43, 2 May 2012 (UTC)

I, for one, appreciate a historical perspective; too many of our electrotechnology articles are just a rehash of the spec sheet. The problem is turning something lke the above into an encyclopedia article - the biggest drawback is the requirment for some kind of references. There's a "Wikibooks" project about which I know litle, but which may be better set up to accept personal recollections. I think the above could be usefully retained on the talk page to perhaps give furue editos some ideas of things to look for; the seleniumm diode logic, for example, is something I'd never heard of and if it could be documented, it woudl be a fascinating addition. Was it publicly announced or just a research project that never made it to product stage? --Wtshymanski (talk) 14:39, 2 May 2012 (UTC)

Thanks for the nice words. I have found an IBM spec sheet with card component placement for our DTL 4 two way gate that I may have designed and also the Dual Trigger. IBM didn’t publish this information since it would have told the competition how we did it.

The SMALL project was a serious design effort when I was on it. I moved on to design some Modems and such but another engineer continued the work and I saw at least one card after they changed to silicon diodes. The selenium diodes were a lot of fun trying to package them but in the end I guess they just didn’t have any reliability. I don’t know if you are aware of the selenium rectifiers used in TVs and radios back then but they were really nasty. They burned out in three to five years and it was very obvious what happened as they smelled like rotten eggs. We could actually take a sheet of the stuff and just punch a disk out of it and it was a diode with high forward drops and low leakage like silicon. No one understood what made them work, they just did. IBM never publicly announced their circuits, only the machines that used them. What circuits that have been found from IBM I believe were things individuals found and published, like the link above.

I will look at the Wikibooks to see if that can help me. I think this Logic Circuits section is much more strict about the hard copy references. I have added information in other sections that stayed. UPCMaker (talk) 19:32, 2 May 2012 (UTC)

My era of tube-swapping and TV-dismantling narrowly missed the selenium age, thoguh I did see some selenium stacks in obsolescent radio gear now and then, and I'm sure I have a selenium stack somewhere in the garage and probably a selinum photocell about somewhere, too. I think it's worth mentioning the logic application under Selenium rectifier with a citation to that data sheet. --Wtshymanski (talk) 20:41, 2 May 2012 (UTC)

Has anybody read this?[edit]

Has anybody read this article lately? The first paragraph of the Implementation section is mostly nonsense. The first sentence may be tolerable. Anybody with any knowledge of electronics and especially Transistor Circuit Design and Logic Circuits will be left scratching their head. The schematic is good except for power supply labels (V- and V+ would normally be –V and +V). OK that might be OK. It should have a speed-up capacitor. OK that might be OK. The text makes no sense at all.

What does this mean?: (The two resistors R3 and R4 form a resistive summing circuit with weighted inputs that adds the negative bias voltage V− to the positive diode logic output voltage.) It makes no sense to anyone that has an understanding of electronics. R3 and R4 provide a current sum to drive the base. They do not add voltages.

What does this mean?: (As a result, the unipolar (positive) diode output voltage (about V+ for logical one and 1.0 V for logical zero) is converted into a bipolar voltage (a few volts above and below ground) to drive the output transistor). This makes no sense. Unipolar and bipolar are cute but explain nothing. The diode’s anodes allow a positive voltage of about half of V+ for a good design. R3 and R4 do not drive the transistor with a voltage; they drive the base with a current limited signal to provide base current in the ON condition and provide a reverse base emitter voltage and leakage current in the OFF condition.

If you can’t find someone that knows all these logic circuits you should at least allow me to fix them or better yet let me write them from scratch. I doubt that there is anyone that knows them better than I do. I have designed all of these types of circuits multiple times. They came from the days of discrete transistors which required very different configurations from LSI. You say I can’t do it because I can only speak from personal expert experience. There is very little published that is credible including transistor hand books with circuits designed by people that had no need to design reliable circuits because only armatures used those. Other areas of Wikipedia accept my editing in far more complex topics than a few logic circuits. If you don’t allow me to redo these circuits I am tempted to try to simply start a new version. All I am asking is that you allow me to donate my knowledge to convey something that makes sense.Thingmaker, previously UPCMaker

There are many early transistor books that go into great detail about logic circuits. See, for example, Roehr. Glrx (talk) 23:54, 12 August 2014 (UTC)