|WikiProject Computing / Early||(Rated Start-class)|
The IBM 709 did not include decimal instructions, per se. Only binary arithmetic was supported, primarily in 36-bit signed integer and 36-bit floating-point formats. For larger integers, the Accumulator and M-Q registers could be combined programatically to represent a 70-bit integer plus a 1-bit sign (represented twice.) The index-register functions additially provided limited 15-bit unsigned integer arithmetic (addition and subtraction only.) Decimal data required a programmed radix conversion to a binary representation before being processed.
The main article says arithmetic was two's complement. I am not sure what was intended to be taken literally (obviously arithmetic could be done in any system if it is eventually converted to the machine's representation), but the actual register and memory word formats were sign-magnitude. This is made clear in the 7090/7094 article, which gets it right. The previous paragraph seems (to me) confused. I don't believe the sign bit was replicated. Words were 36 bits (signed magnitude). The AC (accumulator) had two extra bits (P and Q) that were "high order" so carries were not lost (in the register). The MQ (multiplier quotient) register was an extension of the AC so it had 72 bits plus the extra two for P and Q. The Q in MQ had nothing to do with the Q-bit in the AC (at least I think it did not). There was an instruction (can't remember the mnemonic) whose name was "P bit test" that would check to see if the P-bit had been set, or perhaps overlowed, (not sure which) that could be used to ensure that no accuracy was lost if a programmer was willing to check every time after an arithmetic operation. All of the details would be in a 709 (or 7090) Principles of Operation manual. The 7090 article talks about the 7094, which added four extra index registers. It notes that this could cause problems with older programs that assumed only three and used the fact that that the three-bit field for index registers specified which of the three registers would be ORed (I think inclusive) to get the effective index. The 7094 has an Enter Multiple Tag Mode instruction (that enabled the OR functionality) and also an Exit MTM (not sure it was Exit, but probably). Interestingly, it had no instruction to test for multiple tag mode. So that had to be done in software. The trick was that the software had to do the right thing regardless of the mode the machine was in at the time. One way to accomplish this was to save the registers in the order 1, 2, 4, 3, 5, 6, 7 (the only thing that was important was to save 1, 2, and 4 in any order before the other four because whenever a registers was saved the hardware did a read-write cycle on it so if -- for example -- register 6 was saved, the new contents of BOTH register 2 and 4 would be the OR of the previous contents of those registers). After this was done, the rest was easy, something like zero register 1 then load register 3 with non-zero and check to see if register 1 was still zero, if it was, the machine was not in multiple tag mode, but if it was non-zero it was in multiple tag mode. Ksbooth (talk) 05:54, 7 April 2014 (UTC)
- The reference to twos-complement does sound fishy. Though I believe the easiest way to implement sign magnitude in hardware is to convert to ones complement, add or subtract, then convert back. You might even do this by combining the sign bit with the other bits of the adder, but the result is that you don't have to separate adding positive and negative values. That might be the meaning of replicating the sign bit. I think we should take out the reference to twos complement, unless it is somewhere in the 709 documentation. Gah4 (talk) 18:48, 16 March 2015 (UTC)
Vacuum tube details
How many valves\tubes in the CPU ? Was the tube logic/wiring like any of the other products ?