Talk:Reduced instruction set computer
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- 1 Article improvements
- 2 Locked In ?
- 3 History - What about ARM?
- 4 Requested move 10 May 2017
- 5 Problems with the lead
- 6 What about PowerMacs using PowerPC processors from IBM for many years, G3, G4, G5...
In view of the above, I wrote a couple of quick missing articles on load/store vs register/memory architectures etc. that needed to be linked from here. I also fixed the lede. I think the best way to fix the article now is to use a "reduced diversion approach" and just state the basic elements in fully sourced form.
I will start by reducing the history discussions to the basics, add sources etc. and move it upfront. Then discuss the motivation, compilation issues, etc. and eventually work up to the mobile issues etc.
But mobile RISC is not the whole story and the article should also point out that RISC is not just for cell phones and the 8 petaflops K computer (fastest on the TOP500 as of this writing) also uses the SPARC64 - a RISC architecture. So RISC now dominates the low ground in cell phones and some of the high ground on the TOP500. That will shed light on the flexibility of the architecture.
ROMP a single-chip 801?
The article says "The 801 was eventually produced in a single-chip form as the ROMP in 1981, which stood for 'Research OPD [Office Products Division] Micro Processor'." The documents "The 801 Minicomputer - An Overview" and "System 801 Principles of Operation" describe a machine with 24-bit registers, but the "RT PC Technical Reference, Volume 1" describes a machine with 32-bit registers. Was there a later machine in the 801 family that looked like the ROMP? Guy Harris (talk) 01:03, 22 March 2012 (UTC)
- I really do not remember the details of the 801 family follow ups now - it was long ago... Is there an error in what the article says? I do not see one. The Jurij Šilc reference I looked up for the 801 only refers to the 32 bit. They may have played with a few systems, I am not sure now. But just fix it if you see an error. Thanks. History2007 (talk) 01:27, 22 March 2012 (UTC)
- By the way, the Wikipedia ROMP article (which happens to be reference free) says: "The original ROMP had a 24-bit Reduced Instruction Set Computer (RISC) architecture developed by IBM, but the instruction set was changed to 32 bits a few years into the development." So that may be the case, but that is probably too much detail for this article given that the 801 did not go that far on its own. History2007 (talk) 02:04, 22 March 2012 (UTC)
- I was asking a question, not making an assertion; not having been in IBM Research or in the group(s) that did ROMP, I don't know what the full history of the 801 or ROMP was. I've asked in the ROMP article for some citations; more history on the 801 and ROMP would be interesting (but might require help from somebody who was inside IBM at the time). Guy Harris (talk) 07:05, 22 March 2012 (UTC)
- Ok, no problem. But the ROMP article itself needs serious help and I will hence not even look at it again so I will not even be tempted to fix it. I did not even want to fix this one until some user shifted the tags etc. So I will do my best not to think of ROMP, at a time when Processor register needs so much more help.... I posted for help on WikiProj computing about this page and Processor register, but I am not holding my breath that it will get fixed soon that way... History2007 (talk) 08:18, 22 March 2012 (UTC)
iPad, but not smartphones?
The article says "In the 21st century, the use of ARM architecture processors in the Apple iPad provided a wide user base for RISC-based systems." Is the idea here that the iPad (and, potentially, other ARM-based tablets, depending on the success of, for example, Android or Windows 8) are more like "real computers" than smartphones are, so people are more likely to think of them as "computers"? Guy Harris (talk) 01:05, 22 March 2012 (UTC)
- Reasonable comment actually. Shows that I don't think of cell phones as real computers. Please fix that to represent the views of the modern generation for whom cell phones are computers. But the general idea is that RISC now runs $800 computers to $80 million systems. That is the message. History2007 (talk) 01:30, 22 March 2012 (UTC)
Design Philosophy and Berkeley RISC Article
Reading through the article, I didn't find it adequately answered questions like "Why was RISC designed?", "What problem(s) did it solve, and what was conceived to solve the problem(s)?"
I expected these questions would be answered in the "Instruction Set Philosophy" section, but it headlines by stating that RISC isn't a dumb idea, even though the acronym includes the word "reduced". The "Instruction Set Philosophy" section fails at describing the RISC "Instruction Set Philosophy" to people lacking prior knowledge of RISC. The best information I found about RISC on Wikipedia was in the "RISC Concept" section of the Berkeley RISC article. But that section of the article links back to this one as the main article. This is a problem because it contains plenty of information that this article does not, however, without references (at least not with any inline citations). On the talk page of the Berkeley RISC article, there is discussion about removing the "RISC Concept" section of that article because it "is most probably redudant" with this article, but again, this is not true. If references for that information can be found, that information should be moved to this article and a less in-depth summary written for the Berkeley RISC article. I don't yet possess an adequately comfortable working knowledge of RISC or Berkeley RISC to volunteer for this duty, but I hope someone can find my observations useful. Wurtech (talk) 18:18, 27 February 2017 (UTC)
Locked In ?
The article says users of "PC" were locked into intel x86. However C compilers compiled code that had run on risc machines. x86 has emulators. CPUs with the feature of uploading new microcode came on the market long ago. i think "locked in" is a bit strong - never really true. — Preceding unsigned comment added by 18.104.22.168 (talk) 03:56, 14 July 2015 (UTC)
- A C compiler doesn't help if:
- your code isn't written in C (applications for DOS/Windows were also written in assembler, Turbo Pascal, etc., and DOS and (non-NT) Windows themselves had a significant amount of assembler code);
- your code assumes it's running on a little-endian processor, or a processor that doesn't require strict alignment of data;
- etc., so a C compiler for your instruction set is not a magic bullet. Yes, there were x86 emulators, but that didn't manage to make, for example, Alpha able to compete with x86.
- And "the ability to upload new microcode" isn't the same thing as "the ability to run arbitrary instruction sets well", if that's what you're trying to say with "CPUs with the feature of uploading new microcode came on the market long ago." Most RISC CPUs didn't even have microcode, so it's not as if they could be microcoded into running x86 well, and even most microcoded CISC CPUs have instruction fetch paths that are rather oriented towards executing a particular instruction set. Guy Harris (talk) 07:01, 14 July 2015 (UTC)
History - What about ARM?
The article describes the history of the MIPS and SPARC processors in the early 1980s, but what about ARM, which was being developed around the same time?
The ARM (at the time an abbreviation of Acorn RISC Machine) project began in 1983 and the first silicon was delivered in 1985. In 1987 a PC containing an ARM processor was sold under the name "Acorn Archimedes".
It seems to me to be worth mentioning ARM's part in the history of RISC, coming at it from a different angle - much lower-end chips than SPARC and MIPS, which were destined for workstations. Since ARM's designs have since become ubiquitous, I think they are worthy of a greater mention than they get in this article. Marchino61 (talk) 00:10, 4 July 2016 (UTC)
Requested move 10 May 2017
Problems with the lead
The lead presently says:
Reduced instruction set computing, or RISC (pronounced 'risk', /ɹɪsk/), is a CPU design strategy based on the insight that a simplified instruction set provides higher performance when combined with a microprocessor architecture capable of executing those instructions using fewer microprocessor cycles per instruction. A computer based on this strategy is a reduced instruction set computer, also called RISC. The opposing architecture is called complex instruction set computing (CISC).
There's a few problems here besides the issue raised at Talk:Reduced instruction set computer#Requested move 10 May 2017:
- To say that RISC is a CPU design strategy could be misunderstood by laypeople as self-contradictory given that a CPU is understood to be a part of a computer, yet the "C" in "RISC" means "computer". A person familiar with the topic would understand that whilst some sources describe RISC as such, its because of the inadequacies of the language in reconciling how the idea was originally framed and how it is framed today. RISC is better described as a type of computer.
- "Microprocessor architecture" implies that RISC is intrinsically linked to microprocessors. Whilst that's the popular narrative, it's wrong. The first RISC was the IBM 801, and it wasn't a microprocessor.
- "Microprocessor architecture" is linked to "microarchitecture"; "microarchitecture" is not a contraction of "microprocessor architecture".
- The use of cycles per instruction (CPI) to mean instruction latency is completely wrong. To speak very generally, CPI is an average of all measured instruction latencies.
- "Microprocessor cycles per instruction" is meaningless, there's no need to qualify "CPI" with "microprocessor".
What about PowerMacs using PowerPC processors from IBM for many years, G3, G4, G5...
It seems the article is not mentioning probably the biggest user of RISC processors, APPLE. In the 90s all Macs were powered by IBM RISC PowerPC processors, then the transition to Intel happened in the early 2000s... — Preceding unsigned comment added by 22.214.171.124 (talk) 13:37, 6 June 2017 (UTC)