In electronics design, tape-out or tapeout is the final result of the design cycle for integrated circuits or printed circuit boards, the point at which the artwork for the photomask of a circuit is sent for manufacture.
Some sources have indicated that the roots of the term can be traced back to the time when paper tape and later magnetic tape reels were loaded with the final electronic files used to create the photomask at the factory. Other sources reference the early days of printed circuit design, when the enlarged (for higher precision) "artwork" for the photomask was manually "taped out" using black line tape and adhesive-backed die cut elements on sheets of PET film. Subsequently the artwork was photographically reduced. A similar process was used for early integrated circuits.
The term tapeout currently is used to describe the creation of the photomask itself from the final approved electronic CAD file. This stage is sometimes referred to as PG, for Pattern Generation. Designers may use this term to refer to the writing of the final file to disk or CD and its subsequent transmission to the semiconductor foundry; however, in current practice the foundry will perform checks and make modifications to the mask design specific to the manufacturing process before actual tapeout. Optical proximity correction is an example of such an advanced mask modification; it corrects for the wave-like behavior of light when etching the nano scale features of the most modern integrated circuits.
A modern IC has to go through a long and complex design process before it is ready for tape-out. Many of the steps along the way utilize software tools collectively known as electronic design automation (EDA). The design must then go through a series of verification steps collectively known as "signoff" before it can be taped-out. Tape-out is usually a cause for celebration by everyone who worked on the project, followed by trepidation awaiting the first article, the first physical samples of a chip from the manufacturing facility (semiconductor foundry).
The weeks before the tapeout are categorized as 'sleepless nights' in the parlance of IC Designers.
First tapeout is rarely the end of work for the design team. Most chips will go through a set of spins in which fixes are implemented after testing the first article. Many different factors can cause a spin, including:
- The taped-out design fails final checks at the foundry due to problems manufacturing the design itself.
- The design is successfully fabricated, but the first article fails functionality tests.
- Magee, Mike (14 July 1999). "What the Hell is… a tapeout?". The Register.
- Mays, Lonne (16 March 2006). "Follow Heuristic Guidelines To Make Surface-Mount PC-Board Footprints". Electronic Design. Archived from the original on 2011-08-11.
- Turley, Jim (2002). The Essential Guide To Semiconductors. Prentice Hall PTR. p. 37. ISBN 0-13-046404-X.