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Template:Infobox CPU

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This template is for CPUs. For generic hardware components, see Template:Infobox computer hardware.

{{{name}}}
[[File:{{{image}}}|{{{image_size}}}|alt={{{alt}}}|{{{alt}}}]]
{{{caption}}}
Produced From {{{produced-start}}} to {{{produced-end}}}
Marketed by {{{soldby}}}
Designed by {{{designfirm}}}
Common manufacturer(s)
  • {{{manuf1}}}
  • {{{manuf2}}}
  • {{{manuf3}}}
  • {{{manuf4}}}
  • {{{manuf5}}}
Max. CPU clock rate {{{slowest}}} {{{slow-unit}}} to {{{fastest}}} {{{fast-unit}}}
FSB speeds {{{fsb-slowest}}} {{{fsb-slow-unit}}} to {{{fsb-fastest}}} {{{fsb-fast-unit}}}
HyperTransport speeds {{{hypertransport-slowest}}} {{{hypertransport-slow-unit}}} to {{{hypertransport-fastest}}} {{{hypertransport-fast-unit}}}
QPI speeds {{{qpi-slowest}}} {{{qpi-slow-unit}}} to {{{qpi-fastest}}} {{{qpi-fast-unit}}}
DMI speeds {{{dmi-slowest}}} {{{dmi-slow-unit}}} to {{{dmi-fastest}}} {{{dmi-fast-unit}}}
Min. feature size {{{size-from}}} to {{{size-to}}}
Instruction set {{{arch}}}
Microarchitecture {{{microarch}}}
CPUID code {{{cpuid}}}
Product code {{{code}}}
Cores {{{numcores}}}
Core name(s)
  • {{{core1}}}
  • {{{core2}}}
  • {{{core3}}}
  • {{{core4}}}
  • {{{core5}}}
  • {{{core6}}}
  • {{{core7}}}
  • {{{core8}}}
  • {{{core9}}}
L1 cache {{{l1cache}}}
L2 cache {{{l2cache}}}
L3 cache {{{l3cache}}}
Model {{{model}}}
Created {{{created}}}
Transistors {{{transistors}}}
Last level cache {{{llcache}}}
Architecture {{{arch1}}}
Instructions {{{instructions}}}
Extensions
  • {{{extensions}}}
  • {{{extensions1}}}
  • {{{extensions2}}}
  • {{{extensions3}}}
Socket {{{socket}}}
Socket(s)
  • {{{sock1}}}
  • {{{sock2}}}
  • {{{sock3}}}
  • {{{sock4}}}
  • {{{sock5}}}
  • {{{sock6}}}
  • {{{sock7}}}
  • {{{sock8}}}
  • {{{sock9}}}
Predecessor {{{predecessor}}}
Successor {{{successor}}}
GPU {{{gpu}}}
Application {{{application}}}
Co-processor {{{co-processor}}}
Package(s)
  • {{{pack1}}}
  • {{{pack2}}}
  • {{{pack3}}}
  • {{{pack4}}}
  • {{{pack5}}}
Product code name(s)
  • {{{pcode1}}}
  • {{{pcode2}}}
  • {{{pcode3}}}
  • {{{pcode4}}}
  • {{{pcode5}}}
  • {{{pcode6}}}
  • {{{pcode7}}}
  • {{{pcode8}}}
  • {{{pcode9}}}
Brand name(s)
  • {{{brand1}}}
  • {{{brand2}}}
  • {{{brand3}}}
  • {{{brand4}}}
  • {{{brand5}}}
  • {{{brand6}}}
  • {{{brand7}}}
  • {{{brand8}}}
  • {{{brand9}}}
Variant {{{variant}}}
{{Infobox CPU
| name           = 
| image          = 
| image_size     = 
| caption        = 
| produced-start = 
| produced-end   = 
| slowest        = 
| fastest        = 
| slow-unit      = 
| fast-unit      = 
| fsb-slowest    = 
| fsb-fastest    = 
| fsb-slow-unit  = 
| fsb-fast-unit  = 
| hypertransport-slowest   = 
| hypertransport-fastest   = 
| hypertransport-slow-unit = 
| hypertransport-fast-unit = 
| qpi-slowest    = 
| qpi-fastest    = 
| qpi-slow-unit  = 
| qpi-fast-unit  = 
| dmi-slowest    = 
| dmi-fastest    = 
| dmi-slow-unit  = 
| dmi-fast-unit  = 
| size-from      = 
| size-to        = 
| soldby         = 
| designfirm     = 
| manuf1         = 
| core1          = 
| sock1          = 
| pack1          = 
| brand1         = 
| arch           = 
| microarch      = 
| instructions   =
| extensions     =
| data-width     =
| address-width  =
| virtual-width  =
| cpuid          = 
| code           = 
| numcores       = 
| l1cache        = 
| l2cache        = 
| l3cache        = 
| l4cache        = 
| llcache        = 
| gpu            =
| application    = 
| predecessor    = 
| successor      = 
| co-processor   =
| variant        =
| pcode          =
}}

Usage

{{Infobox CPU
| name                      = Device Name
| image                     = An image to show in the infobox
| image_size                = Size of the image (defaults to 200px)
| caption                   = A caption for the image
| produced-start            = When production began
| produced-end              = When production ended
| slowest                   = Lowest maximum CPU clock
| fastest                   = Highest maximum CPU clock
| slow-unit                 = Unit for slow speed. Default: GHz
| fast-unit                 = Unit for fast speed. Default: GHz
| fsb-slowest               = Slowest FSB speed
| fsb-fastest               = Fastest FSB speed
| fsb-slow-unit             = Unit for slow speed. Default: MHz
| fsb-fast-unit             = Unit for fast speed. Default: MHz
| hypertransport-slowest    = Slowest HyperTransport speed
| hypertransport-fastest    = Fastest HyperTransport speed
| hypertransport-slow-unit  = Unit for slow speed. Default: GT/s
| hypertransport-fast-unit  = Unit for fast speed. Default: GT/s
| qpi-slowest               = Slowest QPI (QuickPath Interconnect) speed
| qpi-fastest               = Fastest QPI speed
| qpi-slow-unit             = Unit for slow speed. Default: GT/s
| qpi-fast-unit             = Unit for fast speed. Default: GT/s
| dmi-slowest               = Slowest DMI (Direct Media Interface) speed
| dmi-fastest               = Fastest DMI speed
| dmi-slow-unit             = Unit for slow speed. Default: GT/s
| dmi-fast-unit             = Unit for fast speed. Default: GT/s
| size-from                 = Fabrication size
| size-to                   = Another fabrication size
| soldby                    = Often, but not always, the same as the designfirm and/or manuf1
| designfirm                = Often, but not always, the same as manuf1 and/or soldby
| manuf1                    = Common manufacturers of the device (1-5)
| core1                     = Names of the cores (1-9)
| sock1                     = Names of the sockets that the CPU was made for (1-9)
| pack1                     = Names of CPU packages (1-5)
| brand1                    = Marketing names of the CPU (1-9)
| arch                      = Instruction set architecture that the CPU implements
| microarch                 = Microarchitecture of the CPU
| instructions              = Instruction Sets
| extensions                = Extensions to the instructions
| data-width                = Data bus width in bits
| address-width             = Address bus width in bits
| virtual-width             = Virtual address bus width in bits
| cpuid                     = CPUID or PVR value
| code                      = numerical identifier for the CPU (product code)
| numcores                  = Number of cores (2 for dual-core)
| l1cache                   = Level 1 cache size
| l2cache                   = Level 2 cache size
| l3cache                   = Level 3 cache size
| l4cache                   = Level 4 cache size
| llcache                   = Last Level cache size
| gpu                       = Integrated GPU
| application               = Typical application (Embedded, Mobile, Desktop, Server)
| predecessor               = What CPU came before
| successor                 = What CPU came after
| co-processor              = A [[co-processor]](s) used together
| variant                   = Variants in the same family and generation
| pcode1                    = Product code names
}}

All fields, except 'name' are optional

manuf, core, sock, pack, arch, and microarch are AutoLinks, so you can use plain text or a link for them.

The numbered attributes mean that there is allowance for multiples.

See the talk page for some examples which show the full usage of this infobox in a few combinations.

See also