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Tensilica Inc.
Company typeSubsidiary
IndustrySemiconductor intellectual property core
FateAcquired by Cadence Design Systems in 2013
HeadquartersSan Jose, California
Key people
Chris Rowen, Jack Guedj
ProductsMicroprocessors, HiFi audio, DSP cores

Tensilica Inc. was a company based in Silicon Valley in the semiconductor intellectual property core business. It is now a part of Cadence Design Systems.

Tensilica offers customizable Xtensa microprocessor cores. Its product lineup includes HiFi audio/voice DSPs (digital signal processors) with a software library of over 225 codecs from Cadence and over 100 software partners, Vision DSPs designed for imaging, video, computer vision, and neural networks, and the ConnX family of baseband DSPs which includes models such as the dual-MAC ConnX D2 and the 64-MAC ConnX BBE64EP.[citation needed]

Tensilica was founded in 1997 by Chris Rowen (one of the founders of MIPS Technologies). It employed Earl Killian, who contributed to the MIPS architecture, as director of architecture.[1] On March 11, 2013, Cadence Design Systems announced its intent to buy Tensilica for approximately $380 million in cash.[2] Cadence completed the acquisition in April 2013, with a cash outlay at closing of approximately $326 million.[3]

Cadence Tensilica products[edit]

Cadence Tensilica develops SIP blocks to be included on the chip (IC) designs of products of their licensees, such as system on a chip for embedded systems. Tensilica processors are delivered as synthesizable RTL for easy integration into chip designs.

Xtensa configurable cores[edit]

Xtensa processors range from small, low-power cache-less microcontroller to high-performance 16-way SIMD processors, 3-issue VLIW DSP cores, or 1 TMAC/sec neural network processors.[citation needed] All Cadence standard DSPs are based on the Xtensa architecture.[citation needed] The Xtensa architecture offers a user-customizable instruction set through automated customization tools that can extend the Xtensa base instruction set, including SIMD instructions, new register files.[4]

Xtensa instruction set[edit]

The Xtensa instruction set is a 32-bit architecture with a compact 16- and 24-bit instruction set. The base instruction set has 82 RISC instructions and includes a 32-bit ALU, 16 general-purpose 32-bit registers, and one special-purpose register.[5]

  • Xtensa LX — sixth-generation architecture, announced in May 2004[6]
  • Xtensa V — fifth-generation architecture, announced in August 2002;[6] up to 350 MHz in a 130 nm process[7]
  • Xtensa IV — fourth-generation product, announced in June 2001; with more tooling support[8]
  • Xtensa III — third-generation architecture, announced in June 2000; not less than 180 MHz in a 180 nm process[9]

HiFi audio and voice DSP IP[edit]

Simplified block diagrams of HiFi audio engine and Xtensa LX
  • HiFi Mini Audio DSP — A small low power DSP core for voice triggering and voice recognition[10]
  • HiFi 2 Audio DSP — DSP core for low power MP3 audio processing[11]
  • HiFi EP Audio DSP — A superset of HiFi 2 with optimizations for DTS Master Audio, voice pre- and post-processing, and cache management[12]
  • HiFi 3 Audio DSP — 32-bit DSP for audio enhancement algorithms, wideband voice codecs, and multi-channel audio[13]
  • HiFi 3z Audio DSP — For lower-powered audio, wideband voice codecs, and neural-network-based speech recognition.[14]
  • HiFi 4 DSP - Higher performance DSP for applications such as multi-channel object-based audio standards.[15]
  • HiFi 5 DSP - For digital assistants, infotainment, and voice-controlled products.[16]

Vision DSPs[edit]

  • Vision P5 DSP.[17]
  • Vision P6 DSP, with 4X the peak performance of the Vision P5 DSP.[18]
  • Vision C5 DSP, for neural network computational tasks.[19]


  • AMD TrueAudio, found e.g. in the PlayStation 4, in "Kaveri" desktop APUs and in very few of AMD's graphics cards, is based on the Cadence Tensilica HiFi EP Audio DSP.[20][needs update]
  • Microsoft HoloLens uses a special custom-designed TSMC-fabricated 28 nm coprocessor that has 24 Tensilica DSP cores. It has around 65 million logic gates, 8 MB of SRAM, and an additional layer of 1 GB of low-power DDR3 RAM.[21]
  • Espressif ESP8266 and ESP32 Wi-Fi IoT SoCs use respectively the "Diamond Standard 106Micro" (by Espressif referred to as "L106")[22] and the LX6[23]
  • Spreadtrum licensed the HiFi DSP for smartphones.[24]
  • VIA Technologies uses a HiFi DSP in an SoC for set top box, tablets, and mobile devices.[25]
  • Realtek standardized on the HiFi audio DSP for mobile and PC products.[26]


  • In 1997, Tensilica was founded by Chris Rowen.
  • Five years later, Tensilica released support for flexible length instruction encodings, known as FLIX.
  • By 2013, Cadence Design Systems acquired 100% of Tensilica.

Company name[edit]

The brand name Tensilica is a combination of the word Tensile, meaning capable of being extended, and the word Silica from silicon, the element of which integrated circuits are primarily made.[citation needed]


  1. ^ "S-1 Supercomputer Alumni". Retrieved 2019-02-22. Most recently he was chief architect at Tensilica working on configurable/extensible processors.
  2. ^ "Cadence to Acquire Tensilica."
  3. ^ Source: http://ip.cadence.com/news/432/330/Cadence-Reports-First-Quarter-2013-Financial-Results-and-Completes-Acquisition-of-Tensilica
  4. ^ https://0x04.net/~mwk/doc/xtensa.pdf §1.2.2
  5. ^ https://0x04.net/~mwk/doc/xtensa.pdf Chapter 3 "Core Architecture"
  6. ^ a b "Tensilica Xtensa LX Processor with Vectra LX" (PDF). bdti.com. Berkeley Design Technology, Inc. 2005. Retrieved 3 September 2020.
  7. ^ "Xtensa V gets extended for networking and wireless". eetimes.com. EE Times. 3 September 2002. Retrieved 3 September 2020.
  8. ^ "Xtensa IV Widens Lead in Configurable & Extensible Processor Technology". cadence.com. Cadence. 11 June 2001. Retrieved 3 September 2020.
  9. ^ "Tensilica Unveils Feature-Rich Third Generation Xtensa Configurable Processor Technology". cadence.com. Cadence. 14 June 2000. Retrieved 3 September 2020.
  10. ^ "Tensilica Introduces the Smallest, Lowest Power DSP IP Core For Always-Listening Voice Trigger and Voice Recognition". design-reuse.com. Retrieved 2024-03-05.
  11. ^ "Tensilica HiFi 2 Audio DSP Supports HE AAC by Dolby in Digital Radio Mondiale; Now Offers Decoders for All Major International Digital Radio Standards". design-reuse.com. Retrieved 2024-03-05.
  12. ^ "Tensilica Introduces HiFi EP DSP Core for High Quality Audio in Home Entertainment and Smartphone Applications". design-reuse.com. Retrieved 2024-03-05.
  13. ^ "Tensilica's HiFi 3 DSP IP Core Provides Over 1.5x Better Performance for Audio Post Processing and Voice in Smartphones and Home Entertainment". 2012-01-11. Retrieved 2024-03-05.
  14. ^ "Tensilica HiFi 3z DSP IP Core Provides Enhanced Voice and Audio Processing". circuitcellar.com. 2017-07-28. Retrieved 2024-03-05.
  15. ^ "Cadence Announces Fourth Generation Tensilica HiFi DSP Architecture". prnewswire.com. 2015-01-06. Retrieved 2024-03-05.
  16. ^ "HiFi 5 DSP". cadence.com. Cadence. Retrieved 4 October 2023.
  17. ^ "New Cadence Tensilica Vision P5 DSP Enables 4K Mobile Imaging with 13X Performance Boost and 5X Lower Energy".
  18. ^ "Cadence Announces New Tensilica Vision P6 DSP Targeting Embedded Neural Network Applications".
  19. ^ "Cadence Unveils Industry's First Neural Network DSP IP for Automotive, Surveillance, Drone and Mobile Markets".
  20. ^ "Everything You Wanted to Know About AMD TrueAudio". Maximum PC. 2013-10-08. Archived from the original on July 11, 2014. Retrieved 2014-07-06.
  21. ^ "Microsoft's HoloLens secret sauce: A 28nm customized 24-core DSP engine built by TSMC". The Register.
  22. ^ "ESP8266EX Datasheet" (PDF). October 2020. Retrieved 2021-03-23.
  23. ^ "ESP32 SeriesDatasheet" (PDF). 2021-03-19. Retrieved 2021-03-23.
  24. ^ "Spreadtrum Licenses Tensilica HiFi Audio/Voice DSP".
  25. ^ "Customer Spotlight: VIA Technologies Licenses Cadence Tensilica HiFi Audio/Voice DSP".
  26. ^ "Realtek Licenses Cadence's Tensilica HiFi Audio/Voice DSP IP Core".

External links[edit]