Every "tick" represented a shrinking of the process technology of the previous microarchitecture (sometimes introducing new instructions, as with Broadwell, released in late 2014) and every "tock" designated a new microarchitecture. Every year to 18 months, there is expected to be one tick or tock.
In March 2016, Intel announced in a Form 10-K report that it deprecated the tick–tock cycle in favor of a three-step "process–architecture–optimization" model, under which three generations of processors will be produced with a single manufacturing process, with the third generation out of three focusing on optimization. The first optimization of the Skylake architecture was Kaby Lake. Intel then announced a second optimization, Coffee Lake, making a total of four generations at 14 nm.
|8P/4P Server||4P/2P Server/WS||1P Xeon||Enthusiast/WS||Desktop||Mobile|
|65 nm||P6, NetBurst||Presler,
|Tock||Sandy Bridge||Sandy Bridge||2||1||SNB||JKT (Jaketown)||2011-01-09||(Skipped)||Sandy Bridge-EP||Sandy Bridge-E||Sandy Bridge||Sandy Bridge-M|
|Tick||22 nm||Ivy Bridge||3||2||IVB||IVT (Ivytown)||2012-04-29||Ivy Bridge-EX||Ivy Bridge-EP||Ivy Bridge-E||Ivy Bridge||Ivy Bridge-M|
|Tock||Haswell||Haswell||4||3||HSW, CRW (Crystal Well)
with Iris Pro
|4||HSW-ULT, CRW (Crystal Well)
with Iris Pro
|Tick||14 nm||Broadwell||5||4||BDW, -DE, -H, -U/Y||BDX-DE||2014-09-05||Broadwell-EX||Broadwell-EP||Broadwell-E|
|Kaby Lake||7||6||KBL, -U/Y||2017-01-03||Kaby Lake-DT/H
cores: 4 (4/8)
|Kaby Lake R||8||2017-08-21|
|Coffee Lake||8||E-2xxx||CFL||2017-10-05||Coffee Lake-DT/H
cores: 6 (12)
|Process||10 nm||Cannon Lake||2019|
|Architecture||Ice Lake||Ice Lake||2019 ?|
|Tick||45 nm||Bonnell||BNL||2008||Silverthorne||N/A||Diamondville||Tunnel Creek & Stellarton||N/A||Sodaville|
|Tick||32 nm||Saltwell||2011||Medfield (Penwell & Lexington) & Clover Trail+ (Cloverview)||Clover Trail (Cloverview)||Cedar Trail (Cedarview)||Unknown||Centerton & Briarwood||Unknown||Berryville|
|Tick||22 nm||Silvermont||SLM||2013||Merrifield (Tangier) & Moorefield (Anniedale) & Slayton||Bay Trail-T (Valleyview)||Bay Trail-M (Valleyview)||Bay Trail-D (Valleyview)||Bay Trail-I (Valleyview)||Avoton||Rangeley||Unknown|
|Tick||14 nm||Airmont||2014||Binghamton & Riverton||Cherry Trail-T (Cherryview)||Braswell||Denverton Cancelled||Unknown||Unknown|
|Tock||Goldmont||GLM||2016||Broxton Cancelled||Broxton Cancelled
|Apollo Lake||Apollo Lake||Unknown||Denverton||Unknown||Unknown|
Note: There is further the Xeon Phi. It has up to now undergone four development steps with a current top model that got the code name Knights Landing (shortcut: KNL; the predecessor code names all had the leading term Knights in their name) that is derived from the Silvermont architecture as used for the Intel Atom series but realized in a shrunk 14 nm (FinFET) technology.
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A yearly product cadence moves the industry forward in a predictable fashion that can be planned in advance.
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The Kaby Lake platform will be similar to Skylake platform that launches this year and will act as a platform refresher
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We have long known that Intel was planning a ‘Skylake Refresh’ that has always been on the roadmap between Skylake and Cannonlake, but it appears that refresh might be going by the code name Kaby lake now.
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the switch to 10nm manufacturing has been delayed until the second half of 2017.
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Today marks the official launch date of the desktop S-series 7th Generation Core processors...
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Intel Core i5-8250U, i5-8350U, i7-8550U, and i7-8650U Kaby Lake-R launches today (Source: Intel)
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