Jump to content

WDC 65C22

From Wikipedia, the free encyclopedia
W65C22S Versatile Interface Adapter in a DIP-40 package.

The W65C22 versatile interface adapter (VIA) is an input/output device for use with the 65xx series microprocessor family.


Designed by the Western Design Center, the W65C22 is made in two versions, both of which are rated for 14 megahertz operation, and available in DIP-40 or PLCC-44 packages.[1]

  • W65C22N: This device is fully compatible with the NMOS 6522 produced by MOS Technology and others, and includes current-limiting resistors on its output lines. The W65C22N has an open-drain interrupt output (the IRQB pin) that is compatible with a wired-OR interrupt circuit. Hence the DIP-40 version is a "drop-in" replacement for the NMOS part.
  • W65C22S: This device is fully software– and partially hardware–compatible with the NMOS part. The W65C22S' IRQB output is a totem pole configuration, and thus cannot be directly connected to a wired-OR interrupt circuit.

As with the NMOS 6522, the W65C22 includes functions for programmed control of two peripheral ports (ports A and B). Two program–controlled 8-bit bi-directional peripheral I/O ports allow direct interfacing between the microprocessor and selected peripheral units. Each port has input data latching capability. Two programmable data direction registers (A and B) allow selection of data direction (input or output) on an individual I/O line basis.

Also provided are two programmable 16-bit interval timer/counters with latches. Timer 1 may be operated in a one-shot or free-run mode. In either mode, a timer can generate an interrupt when it has counted down to zero. Timer 2 functions as an interval counter or a pulse counter. If operating as an interval counter, timer 2 is driven by the microprocessor's PHI2 clock source. As a pulse counter, timer 2 is triggered by an external pulse source on the chip's PB6 line.

Serial data transfers are provided by a serial to parallel/parallel to serial shift register, with bit transfers synchronized with the PHI2 clock. Application versatility is further increased by various control registers, including an interrupt flag register, an interrupt enable register and two Function Control Registers.


  • Two 16-bit timer/counters
  • Two 8-bit parallel I/O ports, bi-directional, programmable direction and latching
  • One synchronous serial I/O port, bi-directional
  • TTL compatible I/O
  • W65C22N has open-drain interrupt output, W65C22S has push-pull totem-pole interrupt output
  • Software compatible with NMOS 6522 devices
  • Bus compatible with high-speed W65C02S and W65C816S microprocessors
  • Advanced CMOS process technology for low power consumption
  • 1.8V to 5V power supply

See also[edit]


External links[edit]