Wafer-level packaging

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Wafer-level packaging (WLP) is the technology of packaging an integrated circuit while still part of the wafer, in contrast to the more conventional method of slicing the wafer into individual circuits (dice) and then packaging them. WLP is essentially a true chip-scale package (CSP) technology, since the resulting package is practically of the same size as the die.[1] Wafer-level packaging allows integration of wafer fab, packaging, test, and burn-in at wafer level in order to streamline the manufacturing process undergone by a device from silicon start to customer shipment.

Wafer-level packaging consists of extending the wafer fab processes to include device interconnection and device protection processes. Most other kinds of packaging do wafer dicing first, and then put the individual die in a plastic package and attach the solder bumps. Wafer-level packaging involves attaching the top and bottom outer layers of packaging, and the solder bumps, to integrated circuits while still in the wafer, and then wafer dicing.

There is no single industry-standard method of wafer-level packaging at present.

A major application area of WLPs are smartphones due to the size constraints. For example, the Apple iPhone 5 has at least eleven different WLPs, the Samsung Galaxy S3 has six WLPs and the HTC One X has seven. Functions provided WLPs in smartphones include: compass, sensors, power management, wireless etc.[2] In fact, It has recently been rumored that the iPhone 7 will use fan-out wafer level packaging technology in order to achieve a thinner and lighter model.[3][4]

Wafer-level chip scale packaging (WL-CSP) is one of the smallest packages currently available on the market and is produced by OSATs, such as Advanced Semiconductor Engineering (ASE).[5] In February 2015, it was discovered that a WL-CSP chip on the Raspberry Pi 2 had issues with xenon flashes (or any other bright long wave flashes of light), inducing photoelectric effect within the integrated circuit.[6] Thus, careful consideration of exposure to extremely bright light will need to be considered with wafer-level packaging.

See also[edit]

References[edit]

  1. ^ "Tessera Working WLP, Wafer-Level Optics", Semiconductor International, April 1 2009.
  2. ^ By Ed Korczynski, Semiconductor Manufacturing & Design Community. “Wafer-level packaging of ICs for mobile systems of the future.” May 5, 2014. Retrieved February 5, 2016.
  3. ^ By Aaron Mamiit, Tech Times. “Apple Wants a Slimmer iPhone 7 and Will Reportedly Use Fan-Out Packaging Technology.” April 1, 2016. Retrieved April 8, 2016.
  4. ^ By Yoni Heisler, BGR. “Report details new tech Apple is using to make the iPhone 7 thinner and lighter.” March 31, 2016. Retrieved April 14, 2016.
  5. ^ By Mark LaPedus, Semiconductor Engineering. “Fan-Out Packaging Gains Steam.” November 23, 2015. Retrieved May 23, 2016.
  6. ^ By Leon Spencer, ZDNet. “Raspberry Pi 2 power crashes when exposed to xenon flash.” February 9, 2015. Retrieved February 5, 2016.

Further reading[edit]

  • Shichun Qu; Yong Liu (2014). Wafer-Level Chip-Scale Packaging: Analog and Power Semiconductor Applications. Springer. ISBN 978-1-4939-1556-9.