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The zero page is the series of memory addresses at the very beginning of a computer's address space; that is, the page whose starting address is zero. The size of a "page" depends on the context, and the significance of zero-page memory versus higher addressed memory is highly dependent on machine architecture. For example, the Motorola 6800 and MOS Technology 6502 processor families treat the first 256 bytes of memory specially, whereas many other processors do not.
The actual size of the zero page in bytes is determined by the microprocessor design and in older designs, is often equal to the largest value that can be referenced by the processor's indexing registers. For example, the aforementioned 8-bit processors have 8-bit index registers and a page size of 256 bytes. Therefore, their zero page extends from address 0 to address 255.
In early computers, including the PDP-8, the zero page had a special fast addressing mode, which facilitated its use for temporary storage of data and compensated for the relative shortage of CPU registers. The PDP-8 had only one register, so zero page addressing was essential.
Unlike more modern hardware, in the 1970s computer RAM was as fast or faster than the CPU. Thus it made sense to have few registers and use the main memory as an extended pool of extra registers. Since each memory location within the zero page of a 16-bit address bus computer may be addressed by a single byte, it was faster, in 8-bit data bus machines, to access such a location rather than a non-zero page location.
For example, the MOS Technology 6502 has only one general purpose register (the accumulator). As a result, it used the zero page extensively. Many instructions are coded differently for zero page and non-zero page addresses:
LDA $00 ; zero page LDA $0000 ; non-zero page
The above two instructions both accomplish the same thing: they load the value of memory location $00 into the .A register (accumulator). However, the first instruction is only two bytes long and requires three clock cycles to complete. The second instruction is three bytes in length and requires four clock cycles to execute. Obviously, the difference in execution time could significantly improve performance in repetitive code.
Zero page addressing now has mostly historical significance, since the developments in integrated circuit technology have made adding more registers to a CPU less expensive and CPU operations much faster than RAM accesses. Some computer architectures still reserve the beginning of address space for other purposes, though; for instance, Intel x86 systems reserve the first 512 words of address space for the interrupt table if they run in real mode. A similar technique of using the zero page for hardware related vectors was employed in the ARM architecture, leading in some badly written programs to the infamous "ofla" behaviour, which is when a program tries to read information from an unintended memory area, and winds up mistaking executable code for text or vice versa. This is especially a problem if the zero page area is used to store system jump vectors and the firmware is tricked into storing data there.
In fact, quite contrary to the zero page's original preferential use, some modern operating systems such as FreeBSD, Linux and Microsoft Windows actually make the zero page inaccessible to trap uses of NULL pointers. This is useful, as NULL pointers are the method used to represent the value of a reference that points to nothing. Since code operating on a reference will be written assuming it that the reference actually refers to some valid structure or value, catching the case where the reference points to nothing is of use since it is a sure sign of a bug.
- Bray, Andrew C.; Dickens, Adrian C.; Holmes, Mark A. (1983). The Advanced User Guide for the BBC Microcomputer (3 ed.). The Cambridge Microcomputer Centre. ISBN 0-946827-00-1.
- Roth, Richard L. (February 1978) . "Relocation Is Not Just Moving Programs". Dr. Dobb's Journal of Computer Calisthenics & Orthodontia (DDJ). Ridgefield, CA, USA: People's Computer Company. 3 (2): 14-20 (70-76). ISBN 0-8104-5490-4. #22. Archived from the original on 2019-04-19. Retrieved 2019-04-19.