File:Layout and Schematic of JVS Chip.jpg
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Summary
| Description |
English: The layout and schematic of a series array Josephson voltage standard chip |
| Date | CAD program |
| Source |
Used a drawing program |
| Author | EE483597 |
Licensing
EE483597 at English Wikipedia, the copyright holder of this work, hereby publishes it under the following licenses:
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Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license is included in the section entitled GNU Free Documentation License. |
This file is licensed under the Creative Commons Attribution-Share Alike 3.0 Unported license.
Attribution: EE483597 at English Wikipedia
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Original upload log
The original description page was here. All following user names refer to en.wikipedia.
| Date/Time | Dimensions | User | Comment |
|---|---|---|---|
| 2015-09-06 20:01:39 | 484 × 565 | EE483597 | Uploading a self-made file using [[Wikipedia:File_Upload_Wizard|File Upload Wizard]] |
File history
Click on a date/time to view the file as it appeared at that time.
| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 15:36, 15 December 2018 | | 484 × 565 (32 KB) | I love rpgs | Transferred from en.wikipedia (MTC!) (1.1.0) |
File usage
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