A resistor ladder is an electrical circuit made of repeating units of resistors. Two configurations are discussed below, a string resistor ladder and a R-2R ladder.

An R-2R Ladder is a simple and inexpensive way to perform digital-to-analog conversion, using repetitive arrangements of precision resistor networks in a ladder-like configuration. A string resistor ladder implements the non-repetitive reference network.

A string of many, often equally dimensioned, resistors connected between two reference voltages is a resistor string ladder network. The resistors act as voltage dividers between the referenced voltages. Each tap of the string generates a different voltage which can be compared with another voltage: this is the basic principle of a flash ADC (analog to digital converter). Often a voltage is converted to a current enabling the possibility to use a R-2R ladder network.

• Disadvantage: for a n-bits ADC the number of resistors grows exponentially, as $\scriptstyle 2^n-1$ resistors are required, while the R-2R resistor ladder only increases linearly with the number of bits as it needs only $\scriptstyle 2n$ resistors.
• Advantage: Higher impedance values can be reached using the same number of components.

R-2R resistor ladder network (digital to analog conversion, or DAC)

Figure 1: n-bit R-2R resistor ladder

A basic R-2R resistor ladder network is shown in Figure 1. Bit an-1 MSB (most significant bit) to Bit a0 LSB (least significant bit) are driven from digital logic gates. Ideally, the bits are switched between 0 volts (logic 0) and Vref (logic 1). The R-2R network causes the digital bits to be weighted in their contribution to the output voltage Vout. In this circuit 5 bits are shown (bits 4-0), giving (25) or 32 possible analog voltage levels at the output. Depending on which bits are set to 1 and which to 0, the output voltage (Vout) will be a corresponding stepped value between 0 volts and (Vref minus the value of the minimum step, Bit0). The actual value of Vref (and 0 volts) will depend on the type of technology used to generate the digital signals.[1]

For a digital value VAL, of a R-2R DAC of N bits of 0 V/Vref, the output voltage Vout is:

Vout = Vref × VAL / 2N

In the example shown, N = 5 and hence 2N = 32. With Vref = 3.3 V (typical CMOS logic 1 voltage), Vout will vary between 00000, VAL = 0 and 11111, VAL = 31.

Minimum (single step) VAL = 1, we have

Vout = 3.3 × 1 / 32 = 0.1 volts

Maximum output (11111) VAL = 31, we have

Vout = 3.3 × 31 / 25 = 3.2 volts

The R-2R ladder is inexpensive and relatively easy to manufacture since only two resistor values are required (or 1, if R is made by placing a pair of 2R in parallel, or if 2R is made by placing a pair of R in series). It is fast and has fixed output impedance R. The R-2R ladder operates as a string of current dividers whose output accuracy is solely dependent on how well each resistor is matched to the others. Small inaccuracies in the higher significant bit resistors can entirely overwhelm the contribution of the less significant bits. This may result in non-monotonic behavior at major crossings, such as from 01111 to 10000. Depending on the type of logic gates used and design of the logic circuits, there may be transitional voltage spikes at such major crossings even with perfect resistor values. These can be filtered, with capacitance at the output node for instance (the consequent reduction in bandwidth may be significant in some applications). Finally, the 2R resistance is in series with the digital output impedance. High output impedance gates (e.g., LVDS) may be unsuitable in some cases. For all of the above reasons (and doubtless others), this type of DAC tends to be restricted to a relatively small number of bits, although integrated circuits may push the number of bits to 14 or even more, 8 bits or fewer is more typical.

Resistors used with the more significant bits must be proportionally more accurate than those used with the lower significant bits; for example, in the R-2R network shown above, inaccuracies in the Bit4 MSB resistors must be insignificant compared to R/32 (i.e., much better than 3%). Further, to avoid problems at the 10000 to 01111 transition, the sum of the inaccuracies in the lower bits must be significantly less than R/32. The required accuracy doubles with each additional bit—for 8 bits, the accuracy required will be better than 1/256 (0.4%). Within integrated circuits, high accuracy R-2R networks may be printed directly onto a single substrate using thin-film technology, ensuring the resistors share similar electrical characteristics. Even so, they must often be laser trimmed to achieve the required precision. Such on-chip resistor ladders for digital-to-analog converters achieving 14 bits accuracy have been demonstrated. On a printed circuit board, using discrete components, resistors of 1% accuracy would suffice for a 5 bit circuit, however with bit counts beyond this the cost of ever increasing precision resistors becomes prohibitive. For a 10 bit converter, even using 0.1% precision resistors would not guarantee monotonicity of output.