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When used with the "Gainestown" DP processor, which will have two QPIs, the X58 and the two processors may be connected in a triangle or ring. For MP processors such as "Beckton" with more than two QPIs, the X58 is either connected to two processors, which in turn are connected in a "mesh" of QPIs to other processors or attached "in pairs" to two different processors. I/O for "remote" processors is relayed via the inter-processors QPI.
When used with the "Gainestown" DP processor, which will have two QPIs, the X58 and the two processors may be connected in a triangle or ring. For MP processors such as "Beckton" with more than two QPIs, the X58 is either connected to two processors, which in turn are connected in a "mesh" of QPIs to other processors or attached "in pairs" to two different processors. I/O for "remote" processors is relayed via the inter-processors QPI.


X58 board manufacturers can build [[Scalable Link Interface|SLI]]-compatible Intel chipset boards by submitting their designs to [[nVidia]] for validation. However, users wishing to run more than two Nvidia video cards in [[PCI Express|PCIe]] x16 will still need to purchase motherboards equipped with one or more [[Comparison of Nvidia chipsets|nVidia nForce chipsets]]. It is still possible to run more than two video cards in an [[Scalable Link Interface|SLI]]-configuration at fewer [[PCI Express|PCIe]] lane widths.<ref>{{cite news |publisher=AnandTech|date=[[August 28]], [[2008]] |url=http://www.anandtech.com/cpuchipsets/intel/showdoc.aspx?i=3395|title=Hell Freezes Over: NVIDIA Announces Native SLI Support for the Intel X58 Chipset}}</ref> The X58 chipset itself supports up to 36 PCI-Express 2.0 lanes, so it is possible to have two PCIe x16 slots and one PCIe x4 slot or one PCIe x16 slot and two PCIe x8 slots on the same motherboard.<ref name=bittech/>
X58 board manufacturers can build [[Scalable Link Interface|SLI]]-compatible Intel chipset boards by submitting their designs to [[nVidia]] for validation. However, users wishing to run more than two Nvidia video cards in [[PCI Express|PCIe]] x16 will still need to purchase motherboards equipped with one or more [[Comparison of Nvidia chipsets|nVidia nForce chipsets]]. It is still possible to run more than two video cards in an [[Scalable Link Interface|SLI]]-configuration at fewer [[PCI Express|PCIe]] lane widths.<ref>{{cite news |publisher=AnandTech|date=[[August 28]], [[2008]] |url=http://www.anandtech.com/cpuchipsets/intel/showdoc.aspx?i=3395|title=Hell Freezes Over: NVIDIA Announces Native SLI Support for the Intel X58 Chipset}}</ref> The X58 chipset itself supports up to 36 PCI-Express 2.0 lanes, so it is possible to have two PCIe x16 slots and one PCIe x4 slot on the same motherboard.<ref name=bittech/>


== Interfaces ==
== Interfaces ==

Revision as of 17:56, 9 October 2009

Intel X58 I/O hub (IOH)
Codename(s)Tylersburg
CPU supportedCore i7
Xeon 5500 series
Beckton
Socket supportedLGA 1366
Fabrication process65 nm
Southbridge(s)ICH10
Miscellaneous
Release date(s)November 2008
PredecessorIntel X48
Intel 5040
SuccessorTBA
X58 Block Diagram

The Intel X58 (codenamed Tylersburg) is an Intel chip designed to connect Intel processors with Intel QuickPath Interconnect (QPI) interface to peripheral devices. Supported processors implement the Nehalem microarchitecture and therefore have an integrated memory controller (IMC), so the X58 does not have a memory interface. Initially supported processors are the Core i7[1], but the chip will also support future Itanium and Nehalem-based Xeon processors.

The QuickPath architecture differs considerably from earlier Intel architectures, and is much closer to AMD's HyperTransport architecture. Except for the lack of a memory interface, the X58 is similar to the traditional northbridge: it communicates with the processor(s) via the high bandwidth QuickPath Interconnect, it communicates with the southbridge via DMI, and it communicates with high bandwidth peripherals via PCI-E.

The X58 is not a memory controller hub (MCH), because it has no memory interface, so Intel calls it an I/O hub. This should not be confused with the similar term I/O controller hub (ICH) which has traditionally been used to refer to the southbridge chips. Intel documentation now refers to the southbridge as the Legacy I/O Controller Hub.

The X58 has 40 PCIe lanes that are arranged in two x16 links, DMI link and "spare"-based link. When used with the ICH10 I/O Controller Hub with x4 DMI connection the "spare" supports a separate x4 PCIe connection. Future southbridge chips DMI may support a wider DMI.

Each X58 QuickPath Interconnect uses 21 unidirectional differential pairs in each direction, for a total of 82 pins per QPI. At the highest bandwidth, each QPI can transfer up to 12.8 GB/s usable in each direction simultaneously using the QPI protocol. The protocol transfers information in units of 80 bits (called "flits") which contain 8 bits of error correction, 8 bits of QPI routing information, and 64 bits of data.

X58 PCIe ports support full PCIe 2.0 bandwidth (e.g up to 8GB/s per x16 link) and each x16 link may be divided into total 16 lanes in any combinanion of x8, x4, x2 or x1 ports. They also support all features of line-reserved wiring, which means that in the combinations of (x16 + x1/x8) slots, often used on the motherboards, not only x1 or x8 cards may be installed into the x1/x8 slot, but x4 cards should work as well (if not disallowed by the motherboard BIOS.)

Unlike the Front-side bus (FSB), QPI is a point-to-point interface and supports not only processor-chipset interface, but also processor-to-processor connection and chip-to-chip connection. The X58 has two QPIs and can directly connect to two processors on a multi-socket motherboard or form a ring-like connection (processor 1 to X58 to processor 2 back to processor 1). When used with the Intel Core i7, the second QPI is usually unused (though, in principle, the second X58 might be daisy-chained on the board).

When used with the "Gainestown" DP processor, which will have two QPIs, the X58 and the two processors may be connected in a triangle or ring. For MP processors such as "Beckton" with more than two QPIs, the X58 is either connected to two processors, which in turn are connected in a "mesh" of QPIs to other processors or attached "in pairs" to two different processors. I/O for "remote" processors is relayed via the inter-processors QPI.

X58 board manufacturers can build SLI-compatible Intel chipset boards by submitting their designs to nVidia for validation. However, users wishing to run more than two Nvidia video cards in PCIe x16 will still need to purchase motherboards equipped with one or more nVidia nForce chipsets. It is still possible to run more than two video cards in an SLI-configuration at fewer PCIe lane widths.[2] The X58 chipset itself supports up to 36 PCI-Express 2.0 lanes, so it is possible to have two PCIe x16 slots and one PCIe x4 slot on the same motherboard.[1]

Interfaces

See also

References

  1. ^ a b "Nehalem and X58 show up in Taipei". bit-tech.net. May 30, 2008. {{cite news}}: Check date values in: |date= (help)
  2. ^ "Hell Freezes Over: NVIDIA Announces Native SLI Support for the Intel X58 Chipset". AnandTech. August 28, 2008. {{cite news}}: Check date values in: |date= (help)
  3. ^ "Nehalem desktop platform planning". HKEPC. January 3, 2008. {{cite news}}: Check date values in: |date= (help)