ARM Cortex-A9: Difference between revisions
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The '''ARM Cortex-A9 MPCore''' is a multicore processor providing up to 4 |
The '''ARM Cortex-A9 MPCore''' is a multicore processor providing up to 4 [[Cache_coherence]] Cortex-A9 cores each implementing the [[ARM architecture|ARM v7]] [[instruction set architecture]]<ref>[http://www.arm.com/products/CPUs/ARMCortex-A9_MPCore.html ARM Cortex-A9 MPCore - ARM Processor]</ref>. |
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==Features== |
==Features== |
Revision as of 04:21, 22 January 2010
General information | |
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Designed by | ARM |
Common manufacturer |
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Architecture and classification | |
Instruction set | ARM |
Physical specifications | |
Cores |
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The ARM Cortex-A9 MPCore is a multicore processor providing up to 4 Cache_coherence Cortex-A9 cores each implementing the ARM v7 instruction set architecture[1].
Features
Key features of the Cortex-A9 core are:
- Superscalar execution giving over 2.0 DMIPS/MHz.
- NEON SIMD instruction set extension performing up to 16 operations per instruction.
- High performance Floating Point Unit (double the performance of previous ARM FPUs).
- Thumb-2 instruction set encoding reduces the size of programs with little impact on performance.
- TrustZone security extensions.
- Jazelle support for Java execution.
- Program Trace Macrocell and CoreSight Design Kit for unobtrusive tracing of instruction execution.
ARM states that a single core (excluding caches) occupies less than 1.5 mm2 when designed in a TSMC 65 nanometer (nm) generic process.[2], can be clocked at speeds over 1GHz and consumes less than 250mW per core [3].