Talk:I486SX

Free Online Dictionary of Computing article cited as source for this article makes numerous verifiably false statements

This article cites the free online dictionary of computing as the original source. Take a look at that article, dated 1997: http://foldoc.org/Intel+486SX. It makes numerous verifiably incorrect statements that demonstrates the author(s) of that article are hardly experts on microprocessors. Only a fool would rely on any material from that article. Let me point them out:

It states ALL 486SX chips were fabricated with FPUs. Take a look at Intel reference - http://www.intel.com/pressroom/kits/quickreffam.htm#i486 - it shows there were versions of the 486SX with 1.2 million transistors (with FPU) and 0.9 million transistors (without FPU).

It claims that 486SX systems would allow a "DX" to be plugged into an expansion socket. In fact it was a 80487SX not DX that was used to disable the 486SX. (http://upload.wikimedia.org/wikipedia/commons/2/22/KL_Intel_i487SX.jpg)

It states some SX chips only had a 16 bit wide external bus. All 486SX and 487SX chips had a 32 bit wide bus. The author is confusing the 486SX with the 386SX. Both the 386SX and the 486SX were meant to be lower performance as compared to their full functional counterparts, the 386DX and 486DX respectively. The 386SX was lower performance by using a 16 bit databus, but the 486SX was lower performance by disabling or removing the FPU.

It states the 80486 DX has a pin to select 16 or 32 bit bus, but the smaller sx had this hardwired to 16 inside the package. In fact, all 80486SX chips used a 32 bit wide databus had the same signal (BS16#) to control whether the 32 bit databus would perform a 16 or 32 bit transfer. See http://www.intel.com/design/intarch/datashts/27276904.pdf, pages 16 (databus d0-32) and page 20 (BS8#, BS16#). Again, the author is confusing the 486SX with the 386SX.

The author claims there was a 286SX, but there was no such thing as an Intel 286SX. Take a look at the reference above that lists the Intel processors before the 80486. The 386SX marketing campaign had a X through the 286 to suggest that users replace the 286 with a 386SX. http://blogs.intel.com/technology/2008/07/intel_chairman_craig_barrett_o.php

The ironic thing is that the only tiny bit of truth given in the article is ridiculed as a joke. the author ridicules the claim that the 486SX was a sort of "crippleware". In fact, this rumor was true. The idea was to offer a lower performance 486SX to target more price sensitive customers while not compromising the pricing of the high performance 486DX. This is a very common practice of price discrimination in business in general, and specifically in hardware and software projects. Think about Microsoft Windows 7 or Vista. Both are offered with various versions that have a subset of the functionality of their "Ultimate" version. Microsoft could just as easily give everyone Ultimate, but by offering partially "crippled" (to use his word) versions of the software they can squeeze more money out of less price sensitive customers that want all the performance they can get while not losing customers that are more price sensitive but willing to give up some functionality.

The joke about the drill through the precisely correct location is likely a joke made by someone who knew what they were talking about. It was likely not meant to be taken literally, but sort of a tease without explanation. The floating point unit was in fact never removed with a laser, it was disabled by tying a "disable floating point" input pad to power or ground using a bond wire in the package. This joke was probably a reference to the fact that if you disconnected that bond wire, the default state of that input pad was to enable the FPU. So I think the idea behind the joke was that you could disconnect that bond wire by drilling through the bond wire and thereby disconnecting it. The practical way to do this would be to flip off the lid on the PGA package to expose the die and bond wires. People did have a steady enough hand to straighten bond wires on occasion when that were shorting to adjacent bond wires. With a knowledge of which bond wire it was, a person with a steady hand could probably remove that bond wire with a tweezer-like tool. This was possible on the early units in a PGA package.

The article claims that 486SX units were 486DX units that had defective FPUs. There is no citation for this and this happens to be false. The current wikipedia article claims this was true only for early units. That is false too. It was never true. I think this is speculation to rationalize why there was a 80486SX, made by people who did not understand that the price discrimination rationale actually is a very well known and well accepted business strategy. Over time more and more of the material from this article was removed from the wikipedia article. Its time to remove the last bits about the defective FPU. —Preceding unsigned comment added by Awitko (talk • contribs) 19:27, 1 January 2010 (UTC)

You are approaching this in completely the wrong way. Citing your own personal experience is not acceptable in place of sources, even when you address yourself in the third person as your recent edits did. Indeed, if anything that introduces a conflict of interest and if you are unable to remain neutral then this guidance applies. If you are unable to provide sources it doesn't go in - you can't cry off saying public sources are not available. As for the accuracy of the free online dictionary of computing a lot of your criticism are either irrelevant or misplaced. Where does it refer specifically to an INTEL 286SX? I have fuzzy memories of way back then but there were a lot of chips on modules and the like. A quick google suggests it may have been an ICT product. Your assertion that a 486 could not be added to a 486SX board is inaccurate too - many boards allowed it. I could go on but I think you get the general idea - your only source is a potentially false appeal to authority but you show yourself to be far less than infallible. I'll drop crispmuncher a note asking if he has those sources though - I agree it has been too long. 87.112.2.151 (talk) 22:45, 3 January 2010 (UTC)

I am citing what I know to be true based on personal experience of having worked on the device as an intel engineer. As I mentioned, the scenario you include in the wikipedia article also does not have sources so it does not seem rational or fair to require me to provide sources when you have included this without sources since the creation of this article. I am sure you will not find sources for either version because this is the sort of thing that Intel did not include in the databooks. It is the sort of thing that PC Magazine and other consumer magazines speculated on, often incorrectly. In this case, I know for a fact that the description is incorrect - I was the test engineer that created the test programs for the first two versions of the 486SX and versions after I was involved had the FPU completely removed. As for the free online dictionary of computing, I provide a link to the article in my comments. Its a short article so if you spend a few seconds on it you will find the reference to 286SX. Its possible some other company made something they called a 286SX but this article was about Intel products. The author(s) pack so many mistakes on basic information about Intel products in such a short article that it would not be advisable to rely on that article for any information. That author claims the 486DX was the upgrade device for the 486SX when in fact the most common upgrade device by far was a 487SX which had the extra pin to automatically disable the 486SX. Its possible that some systems allowed for the 486DX to upgrade the 486SX (I don't recall) but this was not typical and would require a jumper switch on the board to disable the 486SX since the 486DX did not have the extra pin. Although I can see crispmucher updated the page again, it does still does not include references and it still does not resolve the inaccuracies. 23:12, 24 January 2010 68.50.210.67

As for your comment that my pointing to numerous verifiable, fundamental errors in the sole source are irrelevant and misplaced, I think that does nothing but demonstrate your bias and committment to what has been in this article since the beginning. If an article that states 2+2=5 and 6+3=10, someone would be a fool to use that article as a source for the result of a more complex mathematical expression that they could not compute independently. You could split hairs and say that the basic errors are irrelevant because they were addition and the expression in question is not addition, but a wise person would discount the credibility of the source based on the fundamental errors. The source article gets most (and I mean most) of the statements about verifiable fundamental chip details wrong, why would you trust that same article to provide information on things you cannot verify? Its foolish. How do you justify changing its verifiably false statement that ALL 486SX had defective FPUs (false since many had the FPU completely removed - see above) to the wikipedia statement that EARLY units had defective FPUs (without any citations)? Yes, I do now vaguely recall that at least one system did allow a 486DX to upgrade the 486SX with a jumper switch to send the disable signal to the 486SX. But I think schemes like this were the exception, not the rule. The source article states an exception, but neglects to mention the rule. I don't know how anyone even remotely concerned about integrity of information would even consider relying on that article for any information. Again, at the very least you should apply the same standard to the information currently in the wikipedia article and remove information that cannot be supported by citations. --Awitko (talk) 15:05, 5 February 2010 (UTC)

In part I have to agree with that IP editor. The article in question refers to a 286SX. It does not refer to an Intel 286SX. I agree I've never heard of this part either but to suggest it can't exist simply because Intel never made one is putting words into that source's mouth. Similarly the FOLDOC source does not make the assertion you seem to be trying to pin on it. To quote:

Some systems, e.g. Aopen 486SX, allowed a DX to be plugged into...

Now where does that say that all system had that upgrade path exactly?

I do have issue with relying on FOLDOC too heavily. Large parts of it are sourced from the Jargon File which was more a humorous take in many areas than attempting to be a reliable source. However we can find errors in any source - you yourself had to concede ground (re CPUID) last time you bought this up. Should we completely ignore you because that is what you are arguing for?

However other sources are available. As you yourself indicated "The version you describe is plastered all over the internet..." so finding sources is clearly not a problem. I'm still open to altering this along the liens you wish but we need evidence. Repeatedly exclaiming "I was there" and "I did this, that and the other" are not acceptable - you could be anybody as far as this project is concerned. We need solid verifiable evidence and it does not matter how much you cite your personal memories: citing your recollection is no cite at all since it does not fulfil the requisite criteria. I am not saying that is right or wrong, simply that that 'is the threshold for inclusion. CrispMuncher (talk) 19:08, 5 February 2010 (UTC)

Crispmuncher, this is getting to be ridiculous. I already stated that I can accept that my personal knowledge may not be enough, but at least I am bringing attention to the inaccuracy of which I have no doubt which should cause you to look more carefully at the sourcing of inconsistent statements. I point out that there are many blatant errors in that particular article from that source and you want to defend it based on ignoring all the false statements and focusing on a statement that may only be misleading rather than false? It does say some systems, not all systems, but it neglects to mention the primary upgrade path. The reasonable inference is that most systems don't have any upgrade path and that in some cases this was the upgrade path. It is misleading at best. It does say ALL 486SX had defective FPUs but you chose to ignore that false statement and include a statement that EARLY 486SX chips had defective FPUs without justification. I did not concede ground on CPUID. I pointed out that you were wrong in believing that CPUID was not available in that chip. It was, as I explained below. I saw the statement plastered all over the internet, but not from a reliable source. For all I know this has been cut and pasted based on peoples reading of foldoc, wikipedia and whereever else this rumor started, perhaps speculation from a consumer magazine. Recognize that false information can propagate all over the internet too. The foldoc article is dated 1997 and this false information was imported from that article into the original 486SX wikipedia article in 2002 so it has had a lot of time to propagate. So if you find an article on the internet that doesn't cite a source it is not unreasonable to conclude that it probably came from your own article. You should find a source with citations that trace back to a reliable source like Intel. But I know this information did not come from Intel. More than a year ago, you promised to produce an Intel source and I believe also claimed that Intel explicitly stated this. Where is the source? At least you should acknowledge in the article that your version of events is a rumor with unknown origin. And if you want to be true to your readers, acknowledge the alternative explanation that I provide even if you have to add the disclaimer that it too has no official source. Otherwise, you really should apply the same standard to your scenario and remove it. Stick to the verifiable databook facts about this processor. --Awitko (talk) 21:12, 6 February 2010 (UTC)

ZIF Sockets and FPU Usage

It appears that whoever wrote this entry only knows of 486 chips from a history book. The lack of FPU didn't aversely effect contemporary games, because the lack of the FPU was standard on machines of the era. 486 chips didn't have ZIF sockets, they had LIF sockets. The ZIF wasn't introduced until the Pentium was released. 67.169.145.35 (talk) 16:43, 19 January 2009 (UTC)

This is clearly erroneous. ZIF sockets were not ubiquitous in the same way that they are now, but they were certainly in widespread use. I have a couple of socket 2 and 3 motherboards upstairs with ZIF sockets. See http://www.nuggetlab.com/comptia_equipment.htm for images of 486 ZIF sockets. CrispMuncher (talk) 19:27, 19 January 2009 (UTC)

FPU Disabled/Broken

IMHO the 486 SX was not a 486 Dx with a defective fpu. It was a marketing creation a 486 DX with afpu disabled same production costs but less features.

As so far as I've read, the SX actually had higher production costs than a DX, and that it was sold to try and compete with AMD's midend space. Either way, the SX chips were horrendously slow.

I disagree. Intel certainly said at the time that the FPUs were tested and disabled if not functional. This fits in well with contemporary industry observations that they initially had great difficulty ramping up the yield of the 486DX. As for performance, if running with a 32 bit bus (it could be configured to run with a 16 bit bus like the 386SX), it was identical to a similarly clocked 486 if floating point calculations were not used. CrispMuncher (talk) 14:49, 18 July 2008 (UTC)

CrispMuncher I saw your undo of my edit and your comment. I'm not sure how these disagreements get resolved on Wikipedia. I was a product engineer for the i486DX and the first two versions of the i486SX and I managed the small design project for the first 486SX in a plastic package. I wrote the programs that tested the chips in production worldwide so I can tell you for a fact that is not true that units were built according to whether the FPU passed. And I can tell you that a laser did not disconnect the FPU. It was a bond pad that had a bondwire tied to power or ground that disabled the FPU. You mention an Intel cite that supports your point - please point to it. You are also wrong about the CPUID - it did exist. See for example this cite. http://www.gilanet.com/david/Intel486.htm. I was intimately familar with those numbers at the time and those look right to me. So where do we go from here? Awitko (talk) 23:51, 3 November 2008 (UTC)awitko

I'll dig out a cite in the next day or two, but your edit itself admitted the existence of public statements that this was the case. I'm sure I can find a contemporary press release, datasheet or whatever but that means going up in my loft which I'm not doing tonight. Regarding the CPUID instruction, your reference actually confirms my assertion - CPUID was introduced in 1992 whereas the 486SX was introduced a year earlier. My memory was that later steppings introduced the instruction but according to http://www.intel.com/Assets/PDF/appnote/241618.pdf (page 21, and footnotes on page 23) the CPUID instruction never made it to the 486SX line. It's possible this is a simplification and it did appear on some chips, but given that the troublesome statements are already limited to early chips then any discussion of CPUID is obviously an irrelevance.

That is the key point to bear in mind - those comments relate to early examples. I don't assert that there were no later chips which were intended from the beginning to be SXes and lacked an FPU altogether. Given your experience I would be a fool to argue about your knowledge of particular steppings, and certainly I'm sure you have much to add on this article of benefit. However, is it possible that you are mistaken over dates? If the particular designs you were working on were later on in the 486-on-the-desktop period things could easily have changed by the time you started those particular projects. Finally, one of the weaknesses of Wikipedia is that sources are needed for contentious material. Expert opinion such as your own is welcome but still needs to be backed up by publically available information. CrispMuncher (talk) 20:13, 4 November 2008 (UTC)

The version you describe is plastered all over the internet, but it is simply untrue. Absolutely, no doubt. The problem is that this was an internal implementation issue that Intel had no interest in discussing publicly so I am virtually certain you won't find anything in official Intel literature. I was at Intel from 1988 to 1999. I was on the debug team for the original i486DX. The original i486DX had the disable floating point (DFP) pad from the beginning. I think it was initially conceived as a debug option and only later did Intel decided to use it to segment the market. I was involved on the original i486SX from the very beginning. I was on a team of about 12 that were recognized for the implementation of the original i486SX. I was involved in both versions that had an FPU and we always disabled using a bond wire option. And versions after I was involved had the FPU removed. As far as the CPUID, the reference shows CPUID for the early versions of the i486DX which go back to 1989 so that definitely predated the introduction of the i486SX. How the CPUID was accessed is not really relevant here, but although there may not have been an instruction at the time (I can't remember), there was a way to get the CPUID on the databus. For example, when I designed the i486SX for the plastic package, I started with a process shrink version of the i486DX and one of the several changes I made was to change the hardwired CPUID.

Crispmuncher. If you look on page 11 of your appnote you will see it state: "Later, with the advent of the Intel386 processor, Intel implemented processor signature identification that provided the processor family, model, and stepping numbers to software, but only upon reset." So the CPUID was accessable for the 486SX without using the CPUID instruction. Also, if you look at http://www.intel.com/pressroom/kits/quickreffam.htm#i486 at the last page you will see a reference to 486SX versions with (1) 1.2 million transistors on a 1.0 micron process which is the same number of transistors at the 80486DX listed there (thus this version is the one with a FPU that was disabled) and (2) 0.9 million transistors on a 0.8 micron process (this is the one with the FPU removed). I worked on an interim product in the PQFP package that had 1.2 million transistors on the 0.8 micron process - which is not listed there. Awitko (talk) 04:48, 10 November 2008 (UTC)

Crispmuncher. I also want to address your earlier point about i486DX yields. I gather than you believe the motivation behind the i486SX was to salvage defective units during i486DX manufacturing. The i486SX was announced about 20 months after production 486DX units started shipping. At that point, we were running high volumes and had good yields. The motivation behind the i486SX was price discrimination. We could compete with the mid-range AMD product using our lower performance i486SX without having to compromise pricing on our high end i486DX product. You find price discrimination as a way to increase profits in many businesses. Think first class and coach tickets on airlines. If all seats were first class, many of the coach customers would be lost. If all seats were coach, they would lose the premium that the first class customers would have been willing to pay. It works even if the differences in prices have little or nothing to do with the cost of providing the different levels of service. For example, Vista Home, Professional, and Ultimate are three products that have different prices but all three cost Microsoft the same amount to produce. The i486SX strategy also allowed us to sell highly profitable i487 upgrade chips to end users that wanted to add FPU capability to their i486SX PC. Awitko (talk) 17:41, 10 November 2008 (UTC)

And I don't know the origin of the story that i486SX units had defective FPU units that were permanently disconnected by laser. It was certainly convenient for Intel that people believed it. For the early i486SX in a PGA package, one could flip the lid off the package and. if they had a steady hand and knew which bond pad disabled the FPU, they could disconnect the bondwire to reenable the FPU. They probably could have identified the bond pad by comparing the bond wires of an i486DX and an i486SX on the same process (same die size). The chip would still have a CPUID that identifed it as a i486SX - which probably would have caused problems with some software recognizing that an FPU was available, but it would have an enabled FPU like the i486DX. Some of the FPUs would not work because they had not been tested, but many of them would work. The lack of testing did not stop people from overclocking CPUa to run at higher operating frequencies than tested by Intel. Many would have been happy to make that modification to save hundreds of dollars on the i486DX or i487 upgrade. Of course, Intel would not have liked that. BTW, this modification could only have been done in the early units - it could not have been done in the i486SX units that were in a plastic package (not accessible) or the ones with the FPU removed (not available!). Awitko (talk) 19:36, 10 November 2008 (UTC)